Per-
If we had an fpga image that allowed us to store samples on the USRP2
that would be very benefitial, at least for me. Then one could test
algorithms with 100MHz sample-rate. Yes, it would not be possible to
use the channel continously. Receiving 1ms of samples would take 4ms to
upload. However, using the time-stamp functionality one can synchronize
nodes to transmit and receive at the same time and thereby enable
testing e.g. interference rejection algorithms.
How many samples? I think the USRP2 has a 512k x 16 (1 Mbyte) SRAM that's not
used in the default FPGA image.
-Jeff
Quoting George Nychis <address@hidden>:
Short but sweet response. It would be great to have a SDR hardware board
that works with GNU Radio that has a very, very, low latency connection to
the host, like PCI express. Similar to the Microsoft Research SDR
(previously named SORA). That would be great and open up possibilities of
low latency MAC protocol implementations.
Just sayin'!
- George