On Tue, Feb 7, 2012 at 5:37 PM, George Nychis
<address@hidden> wrote:
Hey George,
You can use the relative_rate data member of the blocks. Setting the decimation actually sets the relative_rate to 1.0/decimation. You can get this value with the accessor function "relative_rate()".
Hey Tom,
Using this I can get the decimation rate, but is there a way to get the rate of samples from the ADC? That way I can compute the real clock time in-between samples. For the USRP2, despite the ADC running running at 400Msps, it's rate through the FPGA is actually 100Msps, right?
Actually, I think the ADC is running at 100 Msps, which I think you can get with the "get_clock_rate(mboard)" method. The rate that they come across is then determined by the decimation rate. You can query sample rate from the USRP via the UHD with the "get_sampl_rate()" method.