---> rrc_filter ---> USRP
Rx
USRP ---> fll_band_edge ---> pfb_clock_sync ---> (constellation_receiver, 0) ---> demod_pkts
Now I have modified it to the following.
Tx
packed_to_unpacked(bits_per_trellis_input) ---> trellis_encoder(fsm) ---> chunnks_to_symbol(constellatin) ---> rrc_filter ---> USRP
Rx
USRP ---> fll_band_edge ---> pfb_clock_sync ---> (constelllation_receiver, 4)(symbol) ---> viterbi_combined ---> demod_pkts
I find this structure ends up in more errors than before. ( almost all errors )
1. Does the packet size at the output of pkt.py has anything to do with the block_length in viterbi_combined?
2. Will it make any difference if I specify the starting and ending states??
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Manu T S