Re: [Discuss-gnuradio] getting the fpga counter for timestamping

[Marcus D. Leech]

> > The FPGA interprets the timestamps and waits
> > until the exact moment specified by the time to transmit.
> > The timestamps specify an absolute time on the device
> I would like to know what is the mechanism the FPGA is using to interpret
> the timestamps. You are supposing there is two time references: the host's
> and the FPGA's.
> Is there a way to read the FPGA's specific register that is storing the
> timestamps or the value of the clock tic or whatever manner to schedule the
> transmission.
>
> Every explanation would be great.
> Best regards.
On the host, you can use an API to set the FPGA time register to 
whatever you want:

set_time_now (foo)

Which will cause the FPGAs notion of the TOD to be set to "foo" as soon 
as it processes it.  From that point forward, the FPGA TOD register is 
incremented
  every 10 nanoseconds, based on the master clock on the device.

set_time_next_pps (foo)

Which will cause the FPGA to latch in the time "foo" at the next PPS 
edge.  Just as above, the FPGA TOD register will increment every 10 
nanoseconds.

There are also calls to fetch the FPGA TOD register:

get_time_now ()

Which will tell you what the FPGA thought the TOD was at the time the 
command was processed.

http://files.ettus.com/uhd_docs/doxygen/html/classuhd_1_1usrp_1_1multi__usrp.html 
   may be useful

As might this:

http://files.ettus.com/uhd_docs/manual/html/sync.html





--
Marcus Leech
Principal Investigator
Shirleys Bay Radio Astronomy Consortium
http://www.sbrac.org