Hi Ekko,
i connect the usrp“tx and rx pin whit a wire
to imitate that no error,so i think the ber should be zero.
If you still think that, you have understood neither mine nor Marcus
Leech's email; I'm afraid I can only ask you to read them again.
my problem is that if i want to use uhd_sink and source to
test this grc,is there some other work i need to do compare with
the connect of virtual sink +source.
Again: Virtual sink/source are not doing *anything* to the signal,
whereas the USRP does.
I feel like I shouldn't be simplifying as much, but consider this:
digital complex baseband is in theory equivalent
to a real RF bandpass signal, but it's not the same.
If you directly connect digital things (which is what virtual
sink/source does) then it would be like taking a cake recipe, and
giving it to your neighbor, to read it. Your neighbor will have no
problems reading it.
Transmitting something with a real piece of SDR hardware and
receiving it is more like:
- writing down that recipe (generating the digital signal)
- baking that cake, (digital-to-analog conversion, yielding a
physical baseband signal)
- putting that in a box, (mixing it up to the carrier frequency)
- bringing that box to a post office, (transporting it through a
coax/microwave connection to your channel)
- sending that box to your neighbor, (sending the RF signal
through that channel, i.e. your direct cable)
- your neighbor getting that box, (your receiver getting that
signal)
- taking the cake out of the box, (receiver mixes down to I/Q
baseband),
- and decomposing the cake to finally (analog-to-digital
conversion)
- get an estimate for the original recipe (SDR algorithm)
You will never get a zero BER (which means of infinitely
many recipes you transmit with the
bake-cake-box-post-box-cake-decompose method, every single one is
perfectly estimated), but you can get one that is sufficiently
small for a given application if you can get your SNR to be
good enough.
Best regards,
Marcus
On 11/05/2015 02:37 PM, chai E wrote:
hello marcus
i connect the usrp“tx and rx pin whit a wire to imitate
that no error,so i think the ber should be zero.
my problem is that if i want to use uhd_sink and source to
test this grc,is there some other work i need to do compare
with the connect of virtual sink +source.
this is my question : with the connect of virtual
sink+source the ber is zero ,i think with the connect of
uhd_sink+source the ber should be 0.01 or other number clear
to zero,but when i use uhd_sink +source the ber is clear to 1.
thank for you reply
--Ekko
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