Finding which makefile is including another

[Art Haas]

Hi.

I'm trying to find a way of detecting the filename of a makefile that is
including one or more other makefiles. In GNU Make 3.81 from CVS, there
is the MAKEFILE_LIST variable, and that looked promising until I hit a
snag.

If one makefile includes another one, then MAKEFILE_LIST works fine, but
if the first makefile includes multiple files then things fall apart.
The first included makefile can test MAKEFILE_LIST to see what file make
is currently working on, but the second included file will see two
filenames, the initial makefile and the first included makefile. If
there are more makefiles to include, the list gets longer and longer.

What I'm trying to do is find a way to do a non-recursive make on a
program with many directories, and I was trying to use the name of the
makefile as a means of extracting the subdirectory pathname. If the
directory structure was like this:

foo/Makefile (includes foo/bar1/Makefile and foo/bar2/Makefile)
foo/bar1/Makefile (includes foo/bar1/config/Makefile)
foo/bar1/config/Makefile (includes foo/bar1/config/platform/Makefile)
foo/bar1/config/platform/Makefile
foo/bar2/Makefile

The problem I mentioned earlier would show up when foo/bar2/Makefile tries
to find out what Makefile it was included from.

make starts working on foo/Makefile:

MAKEFILE_LIST: foo/Makefile

make now includes foo/bar1/Makefile:

MAKEFILE_LIST: foo/Makefile foo/bar1/Makefile

make working on foo/bar1/Makefile and includes the config/Makefile

MAKEFILE_LIST: foo/Makefile foo/bar1/Makefile foo/bar1/config/Makefile

make working on foo/bar1/config/Makefile and includes platform/Makefile

MAKEFILE_LIST: foo/Makefile foo/bar1/Makefile foo/bar1/config/Makefile
               for/bar1/config/platform/Makefile

Now make goes back to foo/Makefile and includes foo/bar2/Makefile, so
how can it tell which makefile in MAKEFILE_LIST included it?

There is one easy answer to this problem that I've avoided, and that was
hard-coding in the "parent" name or the Makefile path in to the
Makefiles themselves. I'm trying to avoid hardcoding the paths as I
believe there is a solution to doing what I'm trying to do without the
hardcoded variables.

So, is it possible for a Makefile to determine the filename of another
makefile that is 'include'ing it? Am I overlooking something?

Thanks in advance.

Art Haas
-- 
Man once surrendering his reason, has no remaining guard against absurdities
the most monstrous, and like a ship without rudder, is the sport of every wind.

-Thomas Jefferson to James Smith, 1822