looping over prerequisites

[Rajarshi Guha]

Hi,
  I've recently been delving into make and I'm facing a simple problem
that I can't seem to get around.

I have a src directory that has a few subdirectories, each one having
its own makefile.

My top level makefile would like this:

subdir1:
        $(MAKE) -C subdir1
subdir2:
        $(MAKE) -C subdir2

and so on.

Is there any way to shorten this? In addition the makefiles in each
subdirectory have 2 or 3 targets (all, install, clean). So I'd like to
call the 'all' target in the top level makefile and it should recurse
through the sub directories each time calling the 'all' target in each
subdirectory and so on.

So what I want is:

all:
        for each subdir
                $(MAKE) -C $subdir all
install:
        for each subdir
                $(MAKE) -C $subdir install

and so on

I had tried doing this:

SUBDIRS=subdir1 subdir2 subdir3

all: $(SUBDIRS)
        $(MAKE) -C $(SUBDIRS)

but this clearly doesn't work as it tries to pass everything after the
subdir1 as a target to the makefile under subdir1/

I'd appreciate any pointers to how I can achieve this.

Thanks,

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Rajarshi Guha <address@hidden> <http://jijo.cjb.net>
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