Re: forcing make action independent from specified target?

[Paul D. Smith]

%% address@hidden writes:

  gg> I've a Makefile with several targets. (a barebone version included
  gg> at the end of this email). All targets are used to build something
  gg> (object, executable) except for the targets 'clean, cleanall' (not
  gg> included here).  What I would like to happen is that gmake always
  gg> checks out all include files specified in $(APS_INCLUDES) that are
  gg> not checked out yet before trying to build anything else, when the
  gg> target is not defined as clean or cleanall. I would guess that
  gg> this should be possible without calling gmake recursively, but I
  gg> don't see how.

The traditional way is to use recursion.

If you're willing to require GNU make 3.80 or better, you can also use
order-only prerequisites (see the GNU make manual), although you still
have to declare them on every target.

  gg> I tried several things:

  gg> - overriding MAKECMDGOALS. It would do the job:
  gg>   MAKECMDGOALS := coinc $(MAKECMDGOALS)
  gg>   but overriding this variable is not ineffective.

Correct: the GNU make manual is very clear on this point.

  gg> - setting MAKEFLAGS in the Makefile:
  gg>   MAKEFLAGS := $(MAKEFLAGS -o coinc)

ITYM:

        MAKEFLAGS := $(MAKEFLAGS) -o coinc

or:

        MAKEFLAGS += -o coinc

But that won't work as you discovered, plus -o isn't what you want; that
would declare that target as very old and wouldn't rebuild it.

-- 
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