Re: prerequisite variable confusion

[Ron Peterson]

On Mon, Apr 23, 2007 at 03:08:48PM -0400, Ron Peterson wrote:

> In the following snippet, the first time I run 'make session_module.so'
> it will get as far as making session.o, and then stop with the error:

> OBJFILES := session.o soapServer.o soapC.o stdsoap2.o wslib.o
> 
> %.o: %.cpp soapH.h
>     $(CXX) $*.cpp -c -o $@ $(YCFLAGS)

I kind of figured it out, but I could still use some advice about how to
best handle this.

The soapH.h target builds a bunch of .cpp files like soapServer.cpp
that should then be compiled into object files.  If those files don't
exist when the makefile is called, then it seems that even though
there's a rule that makes them, the rule I made for the %.o target
doesn't know they exist.

I kludged it like this:

all:
    $(MAKE) soapH.h
    $(MAKE) therest
therest: session_module.so ...

Is there a more elegant way to accomplish the same thing?

-- 
Ron Peterson
https://www.yellowbank.com/