Compiling multiple sources in one command implicitly

[EricDeb]

Every time I run the ARM compiler, I have to go grab a license over the
network. So, if I can compile several source files at once, I can greatly
reduce the amount of time to compile the entire project since I don't have
to check-out and check-in the license as much.

Is there a feature in GNU Make that will let me compile several source files
with a single command implicitly? I understand I could write rules like
this:

a.o b.o c.o d.o : a.c b.c c.c d.c
     $(CC) -c $(CPPFLAGS) $?

But, this causes a few problems. First, if any of the .o's are missing we'll
compile all four sources. Second it will be tedious to create the makefiles
like this, especially since this project has many many files in it. Any
ideas? Thanks in advance.
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