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SV: Nested calls in make


From: Lars Jessen
Subject: SV: Nested calls in make
Date: Wed, 26 Nov 2008 18:43:44 +0100

kalyan wrote: 

> I will explain the context.
> I have a build system which has inter-dependencies between modules.
> So for building a module i hope to write a single function 
> which uses a single argument,namely, the module name:
> 
> define build_module
>         MODULE_NAME=$(1); \
>         $(do_some_sanity_checks); \
>         echo building module $$MODULE_NAME; \
>         for dep in `extract_dependencies_of_the_module`;do \
>                 $(call build_module,$$dep); \
>         done; \
>         $(do_build)
> endef
> 
> My hope being, the module which has no dependencies builds 
> first and so on..But it does not achieve what is intended.
> 
> Any hints are greatly appreciated.

I think your problem is the $(do_build) step, you need a topological
ordering of the modules, make
can do that for you, try the following:

# begin GNUmakefile

main_DEPS=mymodule1 mymodule2
mymodule1_DEPS=mymodule2 mymodule3
mymodule2_DEPS=
mymodule3_DEPS=mymodule2 

define do_build
$(1) : $(2)
        @echo building $(1)
endef

build_module=\
        $(if $($(1)_DEFINED),,\
        $(eval $(call do_build,$(1),$($(1)_DEPS)))\
        $(eval $(1)_DEFINED=1)\
        $(eval $(foreach dep,$($(1)_DEPS),$(eval $(call
build_module,$(dep)))))\
        )

all : $(eval $(call build_module,main)) main

# end GNUmakefile


- Lars




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