RE: Rules with multiple outputs

[Lane Schwartz]

>> I am trying to solve an issue regarding rules with multiple outputs. I would 
>> like my makefile to correctly handle these rules, so that the generating 
>> commands are only run once, even when make is run with -j (for parallel). I 
>> am aware that a solution to handle this is using pattern rules, as in the 
>> case when generating files using bison (section 10.5.2 GNU Make manual). 
>> But, in my case the targets that are generated tend not to share named 
>> patterns.
>> 
>> Here's an example of what I would like to do:
>> 
>> a b c: d
>>      foo d
>> 
>> What I have done before is to make sure to only explicitly list the
>> commands for one target, and then list the others as a dependency.
>> Something like this.
> 
> OUTPUTS:=a b c
> 
> $(firstword $(OUTPUTS)):
>         foo d
> 
> $(OUTPUTS): d
> $(firstword $(OUTPUTS)): $(filter-out $(firstword
> $(OUTPUTS)),$(OUTPUTS))
> 
> 
> This will make sure the commands are run only once with make -j and
> keeps the proper dependencies for all the outputs.

Steve,

The solution you present comes close to working for me. The main problem is 
that it won't work if a target lists b or c as dependencies, or if those 
targets are asked for at the command line. To solve that, I believe this works:

OUTPUTS:=a b c

$(firstword $(OUTPUTS)):
        ./foo d

$(OUTPUTS): d

$(filter-out $(firstword $(OUTPUTS)),$(OUTPUTS)): $(firstword $(OUTPUTS))


This works, but feels deeply hackish. Looking through the email archives, it 
looks like this is a fairly common problem. I would be very interested in 
adding a feature to allow multiple targets to explicitly be associated as 
outputs of a single command. What is the best process for requesting such a 
feature, or for submitting a patch to that effect? Also, do others who have 
struggled with this have suggestions for how other implementations of make use 
syntactic sugar to mark this sort of thing?

Thanks,
Lane