Re: Expanding variables as part of function arguments

[Philip Guenther]

On Wed, Jun 9, 2010 at 1:29 AM, Anthony Penniston
<address@hidden> wrote:
> I see; similar to the limitations preventing function calls like "$($(func) 
> $(args))" (although it would be a nice feature to have).

GNU make does have $(call), so this might be what you want: $(call
${func},arg1,arg2,...)

If, to use lisp terminology, you're looking for 'apply' instead of
'funcall', then you have to use $(eval) and a temp variable, but
that's getting weird.


>Indeed, most suffixes will be .o, though I have a few others and the goal was 
>to be able to add sources/objects with minimal updating of the makefile, i.e.:
>
> SRCEXT := .c .p .def .java
> OBJEXT := .o .o .dll .class
>
> From this, the dependency list for the main target could be updated easily 
> from files that match OBJEXT (i.e. "foo.o bar.o baz.dll fred.class").
>
> The only way I can think to achieve this now is to define OBJ as:
> OBJ = $(patsubst
> $(1),$(2),$(wildcard $(addprefix $(SRC)/*,$(SRCEXT))))
> Then join the list as before, but using subst to split on commas and pass 
> $(firstword, $(lastword as arguments $(1) and $(2) to $(call.
> But this seems overly obtuse, and I can't help but feel I'm forcing an 
> unnatural solution. Basically, I have certain source files in /src that I 
> want to pull into the build with minimal editing of the makefile. These 
> mostly depend on extension type and most have generic rules for building. Is 
> there a better way to go about this than the above approach?


$ ls -l
total 10
drwxrwxr-x  4 guenther  wheel  512 Jun  9 17:26 .
drwxrwxrwt  8 root      wheel  512 Jun  9 17:26 ..
-rw-rw-r--  1 guenther  wheel  271 Jun  9 17:35 Makefile
drwxrwxr-x  2 guenther  wheel  512 Jun  9 17:26 a
drwxrwxr-x  2 guenther  wheel  512 Jun  9 17:26 b
$ ls -l *
-rw-rw-r--  1 guenther  wheel  271 Jun  9 17:35 Makefile

a:
total 4
drwxrwxr-x  2 guenther  wheel  512 Jun  9 17:26 .
drwxrwxr-x  4 guenther  wheel  512 Jun  9 17:26 ..
-rw-rw-r--  1 guenther  wheel    0 Jun  9 17:26 foo.c
-rw-rw-r--  1 guenther  wheel    0 Jun  9 17:26 foo.def

b:
total 4
drwxrwxr-x  2 guenther  wheel  512 Jun  9 17:26 .
drwxrwxr-x  4 guenther  wheel  512 Jun  9 17:26 ..
-rw-rw-r--  1 guenther  wheel    0 Jun  9 17:26 bar.java
-rw-rw-r--  1 guenther  wheel    0 Jun  9 17:26 bar.p
$ make
a/foo.o b/bar.o a/foo.dll b/bar.class
$ cat Makefile

SRCEXT = .c .p .def .java
OBJEXT = .o .o .dll .class

SRCDIRS = a b

OBJ = $(foreach pair,$(join ${OBJEXT},${SRCEXT}),$(patsubst %$(suffix
${pair}),%$(basename ${pair}),$(wildcard $(addsuffix /*$(suffix
${pair}),${SRCDIRS}))))

all:
        @echo ${OBJ}

.SUFFIXES:
Makefile:;
$

I.e., join the matched suffixes so you can iterate across them
together, then use $(basename) and $(suffix) to extract the two pieces
in the loop.


Philip Guenther