Re: intentional missing prerequisites?

[Paul Smith]

On Tue, 2010-08-31 at 08:46 -0700, Canham, Timothy K (316C) wrote:
> I would like to know if there is a way to make the definition of the
> prerequisite target optional, and not break the rule.

I can't think of any way to do this.

Of course, you can write a .DEFAULT target that will be invoked for any
missing target.  But that will run even if you fat-finger a target name
or something so it makes your makefiles less easy to work with/debug.

If you have a variable that contains the names of all the targets, then
you can easily say something like:

        $(ALL_TARGETS):

and that would work.  In general any modular make system that works well
that I've ever designed always uses variables for everything (that is,
each makefile is just a list of variable assignments, then there is a
global makefile that provides all the rules based on those variables)
and hardly ever, except in the most extreme situations, contains actual
make rules or even prerequisite definitions.  Using variables gives you
maximum freedom to rework the details.  Others may have had success with
other methods but I always go back to variable assignments.