On Mon, 2022-10-17 at 18:35 +0200, Patrick Begou wrote:
This file will be splitted in master_1.f90, master_2.f90,
master_3.f90.... etc (number of file not known), each of them is a
fortran module and master will be rewritted to use these module. This
is done by a special target and a bash script. It works.
I'm not 100% sure that I understand the situation; it would be much
better if you provided the rules you're trying to write, or even better
a small working example.
But I suppose you mean that there is some tool that takes one input
file and generates a set of output files with an unknown set of names,
then you want to build all those output files.
It turns out that make is not very good at handling this type of
problem: that's why languages such as for example Java, which generate
output files based on the class names rather than input files names, do
not use makefiles (most of the time).
The most straightforward way to do this is to use a recursive
invocation of make: the top-level invocation would split the files,
then invoke a sub-make which would build the files; the sub-make could
use $(wildcard ...) etc. because it would only be invoked after the
spit completed.
But I'm unable with make to get a list of these new master_x.f90
files for the compilation, seams that my variable:
SPLIT_SRC=$(wildcard master_*.f90)
is always empty and only evaluated at the startup.
That's not quite true. The variable SPLIT_SRC is set to the string
"$(wildcard master_*.f90)". It will be evaluated when the variable
"$(SPLIT_SRC)" is evaluated in your makefile. The way in which
variables are evaluated is described here:
https://www.gnu.org/software/make/manual/html_node/Reading-Makefiles.html
So if you try to use this variable as a set of targets or
prerequisites, then it will be evaluated when those targets /
prerequisites are parsed (that is while the makefile is being read in)
and it will be empty.