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From: | Sergei Steshenko |
Subject: | Re: Not able to add delay to transfer function |
Date: | Thu, 6 Aug 2020 02:00:00 +0300 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.1.0 |
On 06/08/2020 1:24, shall689 wrote:
Assuming FPGA means digital implementation (Z-domain) - LTSpice can also run discrete simulations. I.e. there is a memory element - IIRC it's called something like delay line. There's also 'sign' function - maybe it's called differently.The PID is implemented on an FPGA. -- Sent from: https://octave.1599824.n4.nabble.com/Octave-General-f1599825.html
--Sergei.
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