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[lmi-commits] [lmi] master ad538f7 07/14: Fix defect introduced 20210314
From: |
Greg Chicares |
Subject: |
[lmi-commits] [lmi] master ad538f7 07/14: Fix defect introduced 20210314T2207Z: wrong VLR |
Date: |
Thu, 1 Apr 2021 18:15:17 -0400 (EDT) |
branch: master
commit ad538f7f00c7ff13cc50dfb9a2f56020ba3ba2f5
Author: Gregory W. Chicares <gchicares@sbcglobal.net>
Commit: Gregory W. Chicares <gchicares@sbcglobal.net>
Fix defect introduced 20210314T2207Z: wrong VLR
Commit d831ddf65e68ab of 20210314T2207Z set VLR for 7702 purposes to
DB_MaxVlrRate, which is actually a state "usury" limit. For "sample"
products in TX, this induced a double-digit 7702 rate. Production
products were unaffected because they all set DB_AllowVlr to 'false',
but manually toggling that value in their databases would have had the
same effect.
---
i7702_init.cpp | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/i7702_init.cpp b/i7702_init.cpp
index 19061b2..1d65b1a 100644
--- a/i7702_init.cpp
+++ b/i7702_init.cpp
@@ -85,8 +85,7 @@ i7702::i7702
std::vector<double> fixed_loan_rate;
database.query_into(DB_FixedLoanRate, fixed_loan_rate);
// This isn't the actual rate--lmi doesn't yet implement VLR.
- std::vector<double> variable_loan_rate;
- database.query_into(DB_MaxVlrRate, variable_loan_rate);
+ std::vector<double> variable_loan_rate(length_, 0.03);
std::vector<double> guar_loan_spread;
database.query_into(DB_GuarRegLoanSpread, guar_loan_spread);
assign(Bflr_, fixed_loan_rate - guar_loan_spread);
- [lmi-commits] [lmi] master 218e02a 03/14: Reflect short-term guarantees in 7702 interest rates, (continued)
- [lmi-commits] [lmi] master 218e02a 03/14: Reflect short-term guarantees in 7702 interest rates, Greg Chicares, 2021/04/01
- [lmi-commits] [lmi] master 2d10858 06/14: Use DB_AnnIntRateGspDelta instead of hard-coding two percent, Greg Chicares, 2021/04/01
- [lmi-commits] [lmi] master 8a9085a 08/14: Reflect DB_GenAcctIntBonus in 7702 interest, Greg Chicares, 2021/04/01
- [lmi-commits] [lmi] master 836c6f9 09/14: Refactor unit test, Greg Chicares, 2021/04/01
- [lmi-commits] [lmi] master 637f0de 12/14: Reorder unit-test functions, Greg Chicares, 2021/04/01
- [lmi-commits] [lmi] master c291b59 05/14: Assert more preconditions, Greg Chicares, 2021/04/01
- [lmi-commits] [lmi] master cb16682 10/14: Make i7702 vector assignments idempotent, Greg Chicares, 2021/04/01
- [lmi-commits] [lmi] master 8723736 11/14: Make bland1() truly bland, Greg Chicares, 2021/04/01
- [lmi-commits] [lmi] master 36266d1 13/14: Don't echo unneeded values in unit test, Greg Chicares, 2021/04/01
- [lmi-commits] [lmi] master 29b2ad4 14/14: Measure i7702 speed, Greg Chicares, 2021/04/01
- [lmi-commits] [lmi] master ad538f7 07/14: Fix defect introduced 20210314T2207Z: wrong VLR,
Greg Chicares <=
- [lmi-commits] [lmi] master 26db3ec 04/14: Move an assertion upstream, and generalize it, Greg Chicares, 2021/04/01