[lwip-users] Stateful Packet inspection

[Won De Erick]

Hi All,

I am about to start on a stateful packet inspection project to be done in a FPGA.
Anyone who could shed me some lights?
I am targeting to use Xilinx Virtex Board (PCIe) to implement with an embedded processor.

Thanks,

Won

---

Be a better friend, newshound, and 
know-it-all with Yahoo! Mobile.  Try it now.