[paparazzi-commits] [4803]

[antoine drouin]

Revision: 4803
          http://svn.sv.gnu.org/viewvc/?view=rev&root=paparazzi&revision=4803
Author:   poine
Date:     2010-04-16 18:17:48 +0000 (Fri, 16 Apr 2010)
Log Message:
-----------

added support for external clock ( not crystal )

Modified Paths:
--------------
    paparazzi3/trunk/sw/airborne/stm32/init_hw.h

Modified: paparazzi3/trunk/sw/airborne/stm32/init_hw.h
===================================================================
--- paparazzi3/trunk/sw/airborne/stm32/init_hw.h        2010-04-16 18:16:32 UTC 
(rev 4802)
+++ paparazzi3/trunk/sw/airborne/stm32/init_hw.h        2010-04-16 18:17:48 UTC 
(rev 4803)
@@ -58,9 +58,44 @@
 
 
 static inline void hw_init(void) {
-/* Setup the microcontroller system. Initialize the Embedded Flash Interface,  
-     initialize the PLL and update the SystemFrequency variable. */
-  SystemInit();
+
+  /* Setup the microcontroller system. 
+   *  Initialize the Embedded Flash Interface,  
+   *  initialize the PLL and update the SystemFrequency variable. 
+   */
+  /* RCC system reset(for debug purpose) */
+  RCC_DeInit();
+  /* Enable HSE with external clock ( HSE_Bypass ) */
+  RCC_HSEConfig( RCC_HSE_Bypass );
+  /* Wait till HSE is ready */
+  ErrorStatus HSEStartUpStatus = RCC_WaitForHSEStartUp();
+  if (HSEStartUpStatus != SUCCESS) {
+    /* block if something went wrong */
+    while(1) {}
+  }
+  else {
+    /* Enable Prefetch Buffer */
+    FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
+    /* Flash 2 wait state */
+    FLASH_SetLatency(FLASH_Latency_2);
+    /* HCLK = SYSCLK */
+    RCC_HCLKConfig(RCC_SYSCLK_Div1); 
+    /* PCLK2 = HCLK */
+    RCC_PCLK2Config(RCC_HCLK_Div1); 
+    /* PCLK1 = HCLK/2 */
+    RCC_PCLK1Config(RCC_HCLK_Div2);
+    /* PLLCLK = 8MHz * 9 = 72 MHz */
+    RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
+    /* Enable PLL */ 
+    RCC_PLLCmd(ENABLE);
+    /* Wait till PLL is ready */
+    while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {}
+    /* Select PLL as system clock source */
+    RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
+    /* Wait till PLL is used as system clock source */
+    while(RCC_GetSYSCLKSource() != 0x08) {}
+  }
+
    /* Set the Vector Table base location at 0x08000000 */
   NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
   /* Configure all unused GPIO port pins in Analog Input mode (floating input