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[paparazzi-commits] [4842] stm32 update


From: antoine drouin
Subject: [paparazzi-commits] [4842] stm32 update
Date: Wed, 21 Apr 2010 09:24:56 +0000

Revision: 4842
          http://svn.sv.gnu.org/viewvc/?view=rev&root=paparazzi&revision=4842
Author:   poine
Date:     2010-04-21 09:24:56 +0000 (Wed, 21 Apr 2010)
Log Message:
-----------
stm32 update

Modified Paths:
--------------
    paparazzi3/trunk/sw/airborne/stm32/i2c_hw.c
    paparazzi3/trunk/sw/airborne/stm32/i2c_hw.h
    paparazzi3/trunk/sw/airborne/stm32/init_hw.h
    paparazzi3/trunk/sw/airborne/stm32/stm32f10x_flash_hd.ld
    paparazzi3/trunk/sw/airborne/stm32/uart_hw.c
    paparazzi3/trunk/sw/airborne/stm32/uart_hw.h

Added Paths:
-----------
    paparazzi3/trunk/sw/airborne/stm32/led_hw.c

Modified: paparazzi3/trunk/sw/airborne/stm32/i2c_hw.c
===================================================================
--- paparazzi3/trunk/sw/airborne/stm32/i2c_hw.c 2010-04-21 09:24:20 UTC (rev 
4841)
+++ paparazzi3/trunk/sw/airborne/stm32/i2c_hw.c 2010-04-21 09:24:56 UTC (rev 
4842)
@@ -13,6 +13,7 @@
 #define I2C_RECEIVER                0x01
 static const uint8_t i2c2_direction = I2C_TRANSMITTER;
 
+
 void i2c1_hw_init(void) {
 
   NVIC_PriorityGroupConfig(NVIC_PriorityGroup_0);
@@ -21,17 +22,17 @@
   /* Configure and enable I2C1 event interrupt 
-------------------------------*/
   NVIC_InitStructure.NVIC_IRQChannel = I2C1_EV_IRQn;
   NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
-  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3;
+  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
   NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
   NVIC_Init(&NVIC_InitStructure);
 
   /* Configure and enable I2C1 err interrupt -------------------------------*/
   NVIC_InitStructure.NVIC_IRQChannel = I2C1_ER_IRQn;
   NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
-  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3;
+  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
   NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
   NVIC_Init(&NVIC_InitStructure);
-  
+
   /* Enable peripheral clocks 
--------------------------------------------------*/
   /* Enable I2C1 clock */
   RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE);
@@ -60,17 +61,17 @@
   /* Apply I2C configuration after enabling it */
   I2C_Init(I2C1, &I2C_InitStructure);
 
-  /* Enable I2C1 event, buffer and error interrupts */
-  I2C_ITConfig(I2C1, I2C_IT_EVT, ENABLE);
-  //  I2C_ITConfig(I2C1, I2C_IT_EVT | I2C_IT_ERR, ENABLE);
-  //  I2C_ITConfig(I2C1, I2C_IT_EVT, ENABLE);
+  /* Enable I2C1 error interrupts */
+  I2C_ITConfig(I2C1, I2C_IT_ERR, ENABLE);
 
+ 
 }
 
 
 void i2c1_ev_irq_handler(void) {
   switch (I2C_GetLastEvent(I2C1)) {
   case I2C_EVENT_MASTER_MODE_SELECT:                 /* EV5 */
+    /*    DEBUG1_T(); */
     if(i2c2_direction == I2C_TRANSMITTER) {
       /* Master Transmitter : Send slave Address for write */
       I2C_Send7bitAddress(I2C1, (i2c1_slave_addr&0xFE), 
I2C_Direction_Transmitter);
@@ -84,14 +85,18 @@
     /* Master Transmitter --------------------------------------------------*/
     /* Test on I2C1 EV6 and first EV8 and clear them */
   case I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED:  
+    /*DEBUG2_T();*/
+    /* enable empty dr if we have more than one byte to send */
+    //    if (i2c1_len_w > 1)
+      I2C_ITConfig(I2C1, I2C_IT_BUF, ENABLE);
     /* Send the first data */
-    I2C_ITConfig(I2C1, I2C_IT_BUF, ENABLE);
     I2C_SendData(I2C1, i2c1_buf[0]);
     i2c1_index = 1;
     break;
     
     /* Test on I2C1 EV8 and clear it */
   case I2C_EVENT_MASTER_BYTE_TRANSMITTING:  /* Without BTF, EV8 */     
+    /*DEBUG3_T();*/
     if(i2c1_index < i2c1_len_w) {
       I2C_SendData(I2C1, i2c1_buf[i2c1_index]);
       i2c1_index++;
@@ -103,9 +108,20 @@
     break;
 
   case I2C_EVENT_MASTER_BYTE_TRANSMITTED: /* With BTF EV8-2 */
-    if(i2c1_index >= i2c1_len_w) {
-      I2c1StopHandler();
+    /*DEBUG4_T();*/
+    if(i2c1_index < i2c1_len_w) {
+      I2C_SendData(I2C1, i2c1_buf[i2c1_index]);
+      i2c1_index++;
     }
+    else {
+      if (i2c1_finished)
+       *i2c1_finished = TRUE;
+      i2c1_status = I2C_IDLE;
+      // I2C_GenerateSTOP(I2C1, ENABLE);
+      I2C_ITConfig(I2C1, I2C_IT_EVT, DISABLE);
+    }
+      //      while (I2C_GetFlagStatus(I2C1, I2C_FLAG_MSL));
+      //      I2c1StopHandler();
     break;
 
     /* Master Receiver 
-------------------------------------------------------*/
@@ -137,10 +153,17 @@
 }
 
 void i2c1_er_irq_handler(void) {
+  /*DEBUG1_T();*/
   /* Check on I2C2 AF flag and clear it */
-  if (I2C_GetITStatus(I2C1, I2C_IT_AF))
+  if (I2C_GetITStatus(I2C1, I2C_IT_AF)) {
     I2C_ClearITPendingBit(I2C1, I2C_IT_AF);
-  LED_ON(4);
+    
+  }
+  if (i2c1_finished)
+       *i2c1_finished = TRUE;
+  i2c1_status = I2C_IDLE;
+  I2C_ITConfig(I2C1, I2C_IT_EVT | I2C_IT_BUF, DISABLE);
+
 }
 
 #endif /* USE_I2C1 */

Modified: paparazzi3/trunk/sw/airborne/stm32/i2c_hw.h
===================================================================
--- paparazzi3/trunk/sw/airborne/stm32/i2c_hw.h 2010-04-21 09:24:20 UTC (rev 
4841)
+++ paparazzi3/trunk/sw/airborne/stm32/i2c_hw.h 2010-04-21 09:24:56 UTC (rev 
4842)
@@ -38,7 +38,7 @@
 extern void i2c1_er_irq_handler(void);
 
 
-#define I2c1SendStart() { I2C_GenerateSTART(I2C1, ENABLE); }
+#define I2c1SendStart() { I2C_GenerateSTART(I2C1, ENABLE); I2C_ITConfig(I2C1, 
I2C_IT_EVT, ENABLE);}
 
 #ifdef I2C1_STOP_HANDLER
 #include I2C1_STOP_HANDLER_HEADER

Modified: paparazzi3/trunk/sw/airborne/stm32/init_hw.h
===================================================================
--- paparazzi3/trunk/sw/airborne/stm32/init_hw.h        2010-04-21 09:24:20 UTC 
(rev 4841)
+++ paparazzi3/trunk/sw/airborne/stm32/init_hw.h        2010-04-21 09:24:56 UTC 
(rev 4842)
@@ -123,6 +123,7 @@
   RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA |
                         RCC_APB2Periph_GPIOB |
                         RCC_APB2Periph_GPIOC |
+                        RCC_APB2Periph_GPIOD |
                         RCC_APB2Periph_AFIO, ENABLE);
   
 

Added: paparazzi3/trunk/sw/airborne/stm32/led_hw.c
===================================================================
--- paparazzi3/trunk/sw/airborne/stm32/led_hw.c                         (rev 0)
+++ paparazzi3/trunk/sw/airborne/stm32/led_hw.c 2010-04-21 09:24:56 UTC (rev 
4842)
@@ -0,0 +1,5 @@
+#include "led.h"
+
+uint8_t led_status[NB_LED];
+
+

Modified: paparazzi3/trunk/sw/airborne/stm32/stm32f10x_flash_hd.ld
===================================================================
--- paparazzi3/trunk/sw/airborne/stm32/stm32f10x_flash_hd.ld    2010-04-21 
09:24:20 UTC (rev 4841)
+++ paparazzi3/trunk/sw/airborne/stm32/stm32f10x_flash_hd.ld    2010-04-21 
09:24:56 UTC (rev 4842)
@@ -24,9 +24,9 @@
 /* Memory Spaces Definitions */
 MEMORY
 {                        
-  RAM   (xrw)  : ORIGIN = 0x20000000, LENGTH = 64K
-  FLASH (rx)   : ORIGIN = 0x8000000,  LENGTH = 512K
-  FLASHB1 (rx) :  ORIGIN = 0x00000000, LENGTH = 0
+  RAM     (xrw): ORIGIN = 0x20000000, LENGTH = 64K
+  FLASH   (rx) : ORIGIN = 0x8000000,  LENGTH = 512K
+  FLASHB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
 }
 
 /* User mode stack top */

Modified: paparazzi3/trunk/sw/airborne/stm32/uart_hw.c
===================================================================
--- paparazzi3/trunk/sw/airborne/stm32/uart_hw.c        2010-04-21 09:24:20 UTC 
(rev 4841)
+++ paparazzi3/trunk/sw/airborne/stm32/uart_hw.c        2010-04-21 09:24:56 UTC 
(rev 4842)
@@ -286,8 +286,11 @@
 volatile bool_t uart3_tx_running;
 uint8_t  uart3_tx_buffer[UART3_TX_BUFFER_SIZE];
 
+#include "led.h"
 
+
 void uart3_init( void ) {
+
   /* init RCC */
   RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
 
@@ -300,16 +303,17 @@
   NVIC_Init(&nvic);
 
   /* Init GPIOS */
+  GPIO_PinRemapConfig(GPIO_PartialRemap_USART3, ENABLE);
   GPIO_InitTypeDef gpio;
   /* GPIOB: USART3 Tx push-pull */
   gpio.GPIO_Pin   = GPIO_Pin_10;
   gpio.GPIO_Mode  = GPIO_Mode_AF_PP;
   gpio.GPIO_Speed = GPIO_Speed_50MHz;
-  GPIO_Init(GPIOB, &gpio);
+  GPIO_Init(GPIOC, &gpio);
   /* GPIOB: USART3 Rx pin as floating input */
   gpio.GPIO_Pin   = GPIO_Pin_11;
   gpio.GPIO_Mode  = GPIO_Mode_IN_FLOATING;
-  GPIO_Init(GPIOB, &gpio);
+  GPIO_Init(GPIOC, &gpio);
 
   /* Configure USART3 */
   USART_InitTypeDef usart;
@@ -354,7 +358,6 @@
     uart3_tx_running = TRUE;
     USART_SendData(USART3, data);
   }
-
   USART_ITConfig(USART3, USART_IT_TXE, ENABLE);
 
 }

Modified: paparazzi3/trunk/sw/airborne/stm32/uart_hw.h
===================================================================
--- paparazzi3/trunk/sw/airborne/stm32/uart_hw.h        2010-04-21 09:24:20 UTC 
(rev 4841)
+++ paparazzi3/trunk/sw/airborne/stm32/uart_hw.h        2010-04-21 09:24:56 UTC 
(rev 4842)
@@ -98,6 +98,13 @@
 
 extern void usart3_irq_handler(void);
 
+#define Uart3ChAvailable() (uart3_rx_insert_idx != uart3_rx_extract_idx)
+#define Uart3Getch() ({                                                        
\
+      uint8_t ret = uart3_rx_buffer[uart3_rx_extract_idx];             \
+      uart3_rx_extract_idx = (uart3_rx_extract_idx + 1)%UART3_RX_BUFFER_SIZE; \
+      ret;                                                             \
+    })
+
 #endif /* USE_UART3 */
 
 #endif /* UART_HW_H */





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