[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Paparazzi-devel] New µC Target with FPU?

From: antoine drouin
Subject: Re: [Paparazzi-devel] New µC Target with FPU?
Date: Tue, 6 Jul 2010 15:08:53 +0200

Hello world

Is it me or its something very close to the old avr paparazzi
paparazzi board ( atmega128 and atmega8 ) ?
it's better, no doubt with the IMU and everything. I did not look at
the schematics, but what is the data communication between the
processors ? They mention 32 Mips so I assume they have a high data
bandwidth to be able to have flexibility to split processing between
CPUs. The old paparazzi board had SPI, but as the processors had no
DMA, bandwidth still had to be limited for processing power reasons.
If it's the case, the good news is paparazzi is supposed to still
support that architecture and it might be not too hard to do the
modifications for low level peripherals code.
At the time I recall Paparazzi was using only a small part of the
processing power. Since then, Paparazzi has grown quite a bit and less
emphasis has been put on optimization of CPU usage. It would be wise
to test that carefully  after the porting. Worse case, some
functionalities could be disabled or optimized. The emulated floats
are big CPU consumers.

Recently I have started to design a new revision of the CSC board (
can servo controller ) based on a
single 48 pin stm32 ( cortex M3 at 72Mhz ). It's originally a servo
driver board, but it's been used quite a bit as an autopilot. I am
trying to put emphasis on making it possible to manufacture at low
cost. In an autopilot, a significant part of the cost comes from
connectors. We want very good connectors, first because we're flying
things that are dangerous and can hurt people, then because the
consequences of a crash are almost always the destruction of a costly
vehicle. Another significant part is the power supply, sensors
represent the third major cost. And finally technology also plays a
role, driving up PCB and assembly cost, which means we want to avoid
fine pitched parts.

Based on this, CSC2 stays with molex connectors, picoblades for
communications, full size for servos connector, but with locking
mechanism. The power supply will be linear regulators. Servo power
rail will be isolated and supplied through an external BEC. There will
be no sensor onboard. I2C, SPI, SERIAL, CAN, USB, JTAG and a couple of
ADCs will be exposed. The smallest pitch will be the TQFP of the STM32
and the board will be 4 layers for EMI performances.

I could post the block diagram of the board if people want to discuss
specifications but my hope is to make this board as affordable as
possible, possibly in the 60$ range.

So... to finish this long mail, if someone is willing to port
Paparazzi to the ardupilot board, I'd be glad to help.



On Tue, Jul 6, 2010 at 12:18 PM,  <address@hidden> wrote:
> I noticed that there is an open-source hardware board called the "ArduPilot 
> Mega" ( that 
> has many features that may make it a good alternative hardware platform for 
> Paparazzi.
> It has many inputs/outputs, 4 serial ports, separate PPM encoder, failsafe 
> option etc. There is also a daughterboard offering IMU etc. It's being 
> mass-produced cheaply by Sparkfun for $60 and could perhaps offer a better 
> alternative to the TWOG.
> In order to integrate it in the Paparazzi environment, the Paparazzi source 
> code would have to be modified to support it. No easy task but certainly 
> doable.
> Any views out there of any shortcomings to this approach? Anyone attempted it 
> yet?
> -----Original Message-----
> From: address@hidden [mailto:address@hidden On Behalf Of antoine drouin
> Sent: Sunday, 2 May 2010 11:30 PM
> To: address@hidden
> Subject: Re: [Paparazzi-devel] New µC Target with FPU?
> By the way, could we get a head up on tinyV3 development ?
> On Sun, May 2, 2010 at 11:25 PM, Pat Hickey <address@hidden> wrote:
>> If you're interested in more computing power and more interfaces,
>> adding a single board computer (Gumstix, Beagleboard etc) to
>> supplement the Paparazzi system is widely practiced. I ported
>> Paparazzi airborne code to run on a Linux SBC -
>> so that I could add USB camera
>> interfaces, wifi, and so on. Working on top of Linux with widely
>> available libraries, programming languages, etc. makes it easier to
>> write the kind of powerful applications you'd want an FPU for anyway,
>> right?
>> On Sun, May 2, 2010 at 5:07 PM, antoine drouin <address@hidden> wrote:
>>> Hello world
>>> My 2 cents...
>>> I believe Lisa/L in its current form is more "powerful" than the
>>> architecture you describe. The 72Mhz Cortex M3 ( STM32F103RE6) is
>>> ideally suited to handle fast IOs, can run FreeRTOS and features 64k
>>> of RAM and 512k of flash. ST just released an improved version with
>>> 96k of RAM and 1M flash ( STM32F103RG ) which is pin compatible and
>>> that I intend to use as soon as I can source it.
>>> For the heavy computations and ease of programming, the OMAP3530
>>> contained in the Gumstix Overo runs at 600MHz, feature 256M of RAM and
>>> 256M of FLASH and runs Linux. This natively has a TCP/IP stack as well
>>> as drivers for a vast panel of peripherals ( Wifi adapters, Webcam,
>>> etc...)
>>> I have kept the STM32 on this design because I find it easier and more
>>> efficient to program low level IOs on an OS-less microcontroller than
>>> on Linux. The communications between the STM and the Overo are done
>>> through SPI, served by DMA on both sides. At the moment the Linux side
>>> uses the generic "spidev" driver but I plan on having a dedicated
>>> kernel driver to handle them in an even more efficient way.
>>> mmmm, and I did not mention the C64 DSP core that is also found in the
>>> Overo chip, in case you need to crunch numbers even faster than what
>>> the Cortex-A8 can do.
>>> Best Regards
>>> Poine
>>> On Sun, May 2, 2010 at 4:45 PM, Francois ALIBERT <address@hidden> wrote:
>>>> Hello everybody.
>>>>     I recently saw new hardwares Tiny V3, and LISA, based on ARM
>>>> architectures. I worked few time ago with Renesas SH2A based
>>>> microcontrollers. A variant of this superscalar core includes a
>>>> single/double precision foating point unit (FPU). Renesas made available a
>>>> new µC (the SH7216), that integrates many interesting things: it can run up
>>>> to 200 MHz, and has: 1MByte of Flash, 128 kByte of RAM, SPI, SCI, Motor
>>>> control drivers (input/output PWM). USB and Ethernet driver. There are
>>>> software tools (reel time kernels, TCP-IP stacks) that are disponible for
>>>> free (FreeRTOS, uIP) for using or for evaluation (µC/OS-III, µC/TCP-IP).
>>>> I used a predecessor of this target, they are very powerful and, do not 
>>>> have
>>>> many bugs...
>>>> What about making a very powerful autopilot board based on this? Paparazzi
>>>> project will introduce more and more capabilities, some on them are from 
>>>> now
>>>> on (EKF for AHRS) CPU time hungry. Introduction of a controller integrating
>>>> a FPU will have to be considered soon or late. And of fact of using full
>>>> RTOS and TCP-IP software (free software and large memories size) could
>>>> introduce new capabilities...
>>>> Renesas SH7216:
>>>> FreeRTOS:
>>>> FreeRTOS for SH7216
>>>> → click on Supported Devices ->Renesas (SuperH, H8S) ->SuperH (SH-2A FPU)
>>>> SH7216 using the Renesas compiler and HEW
>>>> TCP-IP (Application Notes and Sample Code)
>>>> Surch on the page for: TCP-IP
>>>> Micrium :
>>>> µC/OS-III for SH7216 and SH7216 evaluation board:
>>>> Regards
>>>> _______________________________________________
>>>> Paparazzi-devel mailing list
>>>> address@hidden
>>> _______________________________________________
>>> Paparazzi-devel mailing list
>>> address@hidden
>> _______________________________________________
>> Paparazzi-devel mailing list
>> address@hidden
> _______________________________________________
> Paparazzi-devel mailing list
> address@hidden
> _______________________________________________
> Paparazzi-devel mailing list
> address@hidden

reply via email to

[Prev in Thread] Current Thread [Next in Thread]