On Wed, 19 Aug 2020 at 12:25, Mircea Cociuba <
cociuba_mircea@yahoo.com> wrote:
>
> hello,
> This email will be non qemu related, but close to the original problem.
>
> I managed to get the FPU activation sequence to compile, found it on the ARM comunity site:
>
> // ARM 100166_0001_00_en S7.3.2
> __asm("ldr.w r0, =0xE000ED88"); // CPACR
> __asm("ldr r1, [r0]");
> __asm("orr r1, r1, 0xF << 20"); // [20:23] enable CP10 and CP11
> __asm("str r1, [r0]");
>
> The documentation also specifies that this code must be executed in priviledged mode.
> There is little to no reference to priviledged mode in the Arm documentation.
> It briefly specifies that a certain CONTROL register must have a specific bit(nPriv) set to be in privileged mode.
> Where can I find the description of the is register and memory location? and are there specific instructions that work on it?
All this kind of detail is documented in the M-profile
Architecture Reference Manual (definition of privileged
mode, what the CONTROL register is, what memory location
it is at, etc). As Vincent says, execution starts in
privileged mode anyway, so unless your bare-metal code
is going to do operating-system like work of switching
into unprivileged mode to run tasks and then switching
back again, you don't need to change CONTROL.nPRIV.
thanks
-- PMM