[PATCH 2/2] target/arm: Initlaize PMU feature for scratch vcpu

[Gavin Shan]

If the scratch vCPU is initialized without PMU feature, we receive
error on reading PMCR_EL0 as it's invisible in this case. It leads
to host probing failure.

This fixes the issue by initializing the scratch vcpu with the PMU
feature enabled and reading PMCR_EL0 from host. Otherwise, its value
is set according to the detected target.

Fixes: f7fb73b8cdd3 ("target/arm: Make number of counters in PMCR follow the 
CPU")
Signed-off-by: Gavin Shan <gshan@redhat.com>
---
 target/arm/kvm64.c | 32 +++++++++++++++++++++++++++-----
 1 file changed, 27 insertions(+), 5 deletions(-)

diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index 79800f00a7..7311e86d1d 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -516,11 +516,14 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures 
*ahcf)
         QEMU_KVM_ARM_TARGET_NONE
     };
     struct kvm_vcpu_init init = {
-        .features[0] = 0;
+        .features[0] = (1 << KVM_ARM_VCPU_PMU_V3),
     };
 
-    if (!kvm_arm_create_scratch_host_vcpu(cpus_to_try, fdarray, &init)) {
-        return false;
+    if (!kvm_arm_create_scratch_host_vcpu(NULL, fdarray, &init)) {
+        init.features[0] = 0;
+        if (!kvm_arm_create_scratch_host_vcpu(cpus_to_try, fdarray, &init)) {
+            return false;
+        }
     }
 
     ahcf->target = init.target;
@@ -564,8 +567,27 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures 
*ahcf)
                               ARM64_SYS_REG(3, 0, 0, 7, 1));
         err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64mmfr2,
                               ARM64_SYS_REG(3, 0, 0, 7, 2));
-        err |= read_sys_reg64(fdarray[2], &ahcf->isar.reset_pmcr_el0,
-                              ARM64_SYS_REG(3, 3, 9, 12, 0));
+
+        /*
+         * Read PMCR_EL0 from host if PMU feature has been enabled
+         * successfully. Otherwise, the value is set according to
+         * the detected target.
+         */
+        if (init.features[0] & (1 << KVM_ARM_VCPU_PMU_V3)) {
+            err |= read_sys_reg64(fdarray[2], &ahcf->isar.reset_pmcr_el0,
+                                  ARM64_SYS_REG(3, 3, 9, 12, 0));
+        } else {
+            switch (init.target) {
+            case KVM_ARM_TARGET_CORTEX_A53:
+                ahcf->isar.reset_pmcr_el0 = 0x41033000;
+                break;
+            case KVM_ARM_TARGET_CORTEX_A57:
+                ahcf->isar.reset_pmcr_el0 = 0x41013000;
+                break;
+            default:
+                ahcf->isar.reset_pmcr_el0 = 0x41023000;
+            }
+        }
 
         /*
          * Note that if AArch32 support is not present in the host,
-- 
2.23.0