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[PATCH v5 00/31] target/arm: enforce alignment
From: |
Richard Henderson |
Subject: |
[PATCH v5 00/31] target/arm: enforce alignment |
Date: |
Mon, 19 Apr 2021 13:22:26 -0700 |
Based-on: 20210416183106.1516563-1-richard.henderson@linaro.org
("[PATCH v5 for-6.1 0/9] target/arm mte fixes")
Changes for v5:
* Address review issues.
* Use cpu_abort in assert_hflags_rebuild_correctly
The only patch lacking review is the new one:
07-target-arm-Use-cpu_abort-in-assert_hflags_rebuild.patch
r~
Richard Henderson (31):
target/arm: Fix decode of align in VLDST_single
target/arm: Rename TBFLAG_A32, SCTLR_B
target/arm: Rename TBFLAG_ANY, PSTATE_SS
target/arm: Add wrapper macros for accessing tbflags
target/arm: Introduce CPUARMTBFlags
target/arm: Move mode specific TB flags to tb->cs_base
target/arm: Use cpu_abort in assert_hflags_rebuild_correctly
target/arm: Move TBFLAG_AM32 bits to the top
target/arm: Move TBFLAG_ANY bits to the bottom
target/arm: Add ALIGN_MEM to TBFLAG_ANY
target/arm: Adjust gen_aa32_{ld,st}_i32 for align+endianness
target/arm: Merge gen_aa32_frob64 into gen_aa32_ld_i64
target/arm: Fix SCTLR_B test for TCGv_i64 load/store
target/arm: Adjust gen_aa32_{ld,st}_i64 for align+endianness
target/arm: Enforce word alignment for LDRD/STRD
target/arm: Enforce alignment for LDA/LDAH/STL/STLH
target/arm: Enforce alignment for LDM/STM
target/arm: Enforce alignment for RFE
target/arm: Enforce alignment for SRS
target/arm: Enforce alignment for VLDM/VSTM
target/arm: Enforce alignment for VLDR/VSTR
target/arm: Enforce alignment for VLDn (all lanes)
target/arm: Enforce alignment for VLDn/VSTn (multiple)
target/arm: Enforce alignment for VLDn/VSTn (single)
target/arm: Use finalize_memop for aa64 gpr load/store
target/arm: Use finalize_memop for aa64 fpr load/store
target/arm: Enforce alignment for aa64 load-acq/store-rel
target/arm: Use MemOp for size + endian in aa64 vector ld/st
target/arm: Enforce alignment for aa64 vector LDn/STn (multiple)
target/arm: Enforce alignment for aa64 vector LDn/STn (single)
target/arm: Enforce alignment for sve LD1R
target/arm/cpu.h | 105 ++++++++-----
target/arm/translate.h | 38 +++++
target/arm/neon-ls.decode | 4 +-
target/arm/helper-a64.c | 2 +-
target/arm/helper.c | 163 ++++++++++----------
target/arm/translate-a64.c | 214 +++++++++++++-------------
target/arm/translate-sve.c | 2 +-
target/arm/translate.c | 258 +++++++++++++++++---------------
target/arm/translate-neon.c.inc | 117 ++++++++++++---
target/arm/translate-vfp.c.inc | 20 +--
10 files changed, 556 insertions(+), 367 deletions(-)
--
2.25.1
- [PATCH v5 00/31] target/arm: enforce alignment,
Richard Henderson <=
- [PATCH v5 01/31] target/arm: Fix decode of align in VLDST_single, Richard Henderson, 2021/04/19
- [PATCH v5 02/31] target/arm: Rename TBFLAG_A32, SCTLR_B, Richard Henderson, 2021/04/19
- [PATCH v5 03/31] target/arm: Rename TBFLAG_ANY, PSTATE_SS, Richard Henderson, 2021/04/19
- [PATCH v5 05/31] target/arm: Introduce CPUARMTBFlags, Richard Henderson, 2021/04/19
- [PATCH v5 04/31] target/arm: Add wrapper macros for accessing tbflags, Richard Henderson, 2021/04/19
- [PATCH v5 06/31] target/arm: Move mode specific TB flags to tb->cs_base, Richard Henderson, 2021/04/19
- [PATCH v5 07/31] target/arm: Use cpu_abort in assert_hflags_rebuild_correctly, Richard Henderson, 2021/04/19
- [PATCH v5 08/31] target/arm: Move TBFLAG_AM32 bits to the top, Richard Henderson, 2021/04/19
- [PATCH v5 09/31] target/arm: Move TBFLAG_ANY bits to the bottom, Richard Henderson, 2021/04/19