Re: [PATCH v2 5/5] hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read,write}()

[Bin Meng]

Hi Edgar,

On Wed, Sep 1, 2021 at 4:32 PM Edgar E. Iglesias
<edgar.iglesias@xilinx.com> wrote:
>
> On Wed, Sep 01, 2021 at 11:27:24AM +0800, Bin Meng wrote:
> > Read or write to uart registers when unclocked or in reset should be
> > ignored. Add the check there, and as a result of this, the check in
> > uart_write_tx_fifo() is now unnecessary.
>
> Hi Bin,
>
> I thought I had replied to this but it must have gotten lost somewhere.
>
> We've got SW that expects FSBL (Bootlooader) to setup clocks and resets.
> It's quite common that users run that SW on QEMU without FSBL (FSBL typically
> requires the Xilinx tools installed). That's fine, since users can stil use
> -device loader to enable clocks etc.
>
> To help folks understand what's going, a log (guest-error) message would
> be helpful here. In particular with the serial port since things will go
> very quiet if they get things wrong.
>
> Otherwise, this patch is fine with me.
>

Thanks. Will add a separate patch to enable a log message for all places.

Regards,
Bin