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Re: [PATCH 0/3] target/arm: Set FPSCR.LTPSIZE for user-mode


From: Christophe Lyon
Subject: Re: [PATCH 0/3] target/arm: Set FPSCR.LTPSIZE for user-mode
Date: Wed, 15 Sep 2021 11:57:31 +0200

Hi Peter,

Thanks for the prompt patches!

On Tue, Sep 14, 2021 at 2:08 PM Peter Maydell <peter.maydell@linaro.org> wrote:
This patchset fixes https://gitlab.com/qemu-project/qemu/-/issues/613
which is a bug where we weren't setting FPSCR.LTPSIZE correctly
out of reset for the user-mode emulator. The effect is that
when using an M-profile CPU with the low-overhead-branch or MVE
extensions (ie the Cortex-M55) with the linux-user QEMU the 'LE'
instruction would take a UserFault and MVE instructions would
be incorrectly predicated.

This is the result of some over-exuberant ifdeffery in the
arm_cpu_reset() function. Patch 1 fixes that so that most of
the M-profile-specific reset handling is not ifdeffed, and
when we're in user mode we specifically set the FPU state up
cleanly. Patches 2 and 3 are just follow-on tidyup.

Christophe, if you are in a position to test this series with:
 M55 (has Security, MVE and LOB)
 M33 (has Security extension but not MVE/LOB)
 M7 or M4 (no Security, but does have FPU)
that would be ideal. I don't really have much in the way of
test cases for usermode to hand, so it's possible that I
forgot something in the init of the FPU state that might break
one of those combinations. (It does fix the test case attached
to the bug report.)

I ran the GCC testsuite with these configurations, and found no regression compared to qemu-6.0, thanks.
 
In the M55 case, this also enabled many more tests, which is great!

Christophe


thanks
-- PMM

Peter Maydell (3):
  target/arm: Don't skip M-profile reset entirely in user mode
  target/arm: Always clear exclusive monitor on reset
  target/arm: Consolidate ifdef blocks in reset

 target/arm/cpu.c | 39 ++++++++++++++++++++++++++++-----------
 1 file changed, 28 insertions(+), 11 deletions(-)

--
2.20.1



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