Re: Resolution for past Cortex-M issues

[Peter Maydell]

On Sat, 5 Nov 2022 at 01:02, Kiron Sen <kiron.r.sen@gmail.com> wrote:
>
> Hi there,
>
> I'm interested in using QEMU for Cortex-M microcontroller
> applications. I found the QEMU support for STM32, Nordic nRF, MPS2/3
> and Stellaris platforms with Cortex-M. I have some concerns about the
> state of Cortex-M support in QEMU after coming across this thread
> from 2016:
> https://qemu-devel.nongnu.narkive.com/jL3tKvyB/arm-cortex-m-issues#post2
>
> > Our M profile interrupt code is really badly mismodelled. It was
> > written many years ago as a hack based on modifying the A profile
> > support and GIC code, but really M profile is different (the
> > interrupt and exception model is an integrated part of the CPU)...
> > For M profile, NMI is just one of the many interrupt/exceptions; we
> > don't really get it right because we're mis-modelling this with
> > interrupts in an external interrupt controller and exceptions in the
> > CPU model.

That thread is 6 years old, it's very out of date. We've since done a
fair amount of work on the M-profile code and fixed all those issues.
The M-profile CPU models are now in pretty good shape, and we model
several different CPUs, including one with support for v8.1M.

-- PMM