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Re: [PATCH] hw/intc/arm_gicv3: fix prio masking on pmr write


From: Peter Maydell
Subject: Re: [PATCH] hw/intc/arm_gicv3: fix prio masking on pmr write
Date: Tue, 15 Nov 2022 14:07:19 +0000

On Tue, 15 Nov 2022 at 13:41, Jens Wiklander <jens.wiklander@linaro.org> wrote:
>
> On Mon, Nov 14, 2022 at 3:43 PM Peter Maydell <peter.maydell@linaro.org> 
> wrote:
> >
> > On Mon, 14 Nov 2022 at 13:33, Jens Wiklander <jens.wiklander@linaro.org> 
> > wrote:
> > > I've only tested this patch on top of v7.1.0 since I couldn't get current
> > > to run in my test setup.
> > >
> > > In case anyone wonders what I'm testing, it's a setup with Hafnium at
> > > S-EL2, OP-TEE at S-EL1 and the Linux kernel at NS-EL1 (no NS-EL2 for
> > > simplicity).
> >
> > Now is a good time to figure out what's not working with current
> > QEMU, so that if it's a bug in QEMU we can fix it before the
> > 7.2 release. Could you try a bisect of QEMU to see where it broke?
> > Alternatively, if you have repro instructions and prebuilt image
> > files I can have a look.
>
> I've bisected and learned this:
> # No output at all, hangs in TF-A bl1:
> bad commit 48da29e485af ("target/arm: Add ptw_idx to S1Translate")
> # bl1 works again, but TF-A bl2 (at S-EL1 if I've understood it right)
> fails to load some binary:
> commit cead7fa4c060 ("target/arm: Two fixes for secure ptw")

OK, so it looks like maybe 48da29e485af had several bugs and we've
fixed one but there's still one lurking.

> I'm using semihosting to load binaries and in this case it might be
> that QEMU refuses to load the binary into the memory pointed at by
> BL2.

Hmm, I wouldn't have expected that to change.

> I can share the binaries (~50 meg) privately, to test with if needed.
> Or if you'd like instructions to build it I can provide that too.

Yes, if you can put the binaries somewhere I/Richard can get at them
I'll have a look at this.

thanks
-- PMM



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