[Qemu-commits] [COMMIT c7c798e] sparc64 fix context value for ITLB fault

[Anthony Liguori]

From: Igor Kovalenko <address@hidden>

Revert previous change to get_physical_address_code:
I/D MMU context register is shared, so using dmmuregs[1] is correct

Signed-off-by: Igor V. Kovalenko <address@hidden>

diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index 09a2829..e249c64 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -490,7 +490,7 @@ static int get_physical_address_code(CPUState *env,
 #ifdef DEBUG_MMU
     printf("TMISS at 0x%" PRIx64 "\n", address);
 #endif
-    env->immuregs[6] = (address & ~0x1fffULL) | (env->immuregs[1] & 0x1fff);
+    env->immuregs[6] = (address & ~0x1fffULL) | (env->dmmuregs[1] & 0x1fff);
     env->exception_index = TT_TMISS;
     return 1;
 }