[Qemu-commits] [COMMIT d74d6a9] microblaze: Add GDB stub support.

[Anthony Liguori]

From: Edgar E. Iglesias <address@hidden>

Signed-off-by: Edgar E. Iglesias <address@hidden>

diff --git a/gdbstub.c b/gdbstub.c
index 3c34741..7b32fab 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -1156,6 +1156,36 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t 
*mem_buf, int n)
 
     return 4;
 }
+#elif defined (TARGET_MICROBLAZE)
+
+#define NUM_CORE_REGS (32 + 5)
+
+static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
+{
+    if (n < 32) {
+       GET_REG32(env->regs[n]);
+    } else {
+       GET_REG32(env->sregs[n - 32]);
+    }
+    return 0;
+}
+
+static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
+{
+    uint32_t tmp;
+
+    if (n > NUM_CORE_REGS)
+       return 0;
+
+    tmp = ldl_p(mem_buf);
+
+    if (n < 32) {
+       env->regs[n] = tmp;
+    } else {
+       env->sregs[n - 32] = tmp;
+    }
+    return 4;
+}
 #elif defined (TARGET_CRIS)
 
 #define NUM_CORE_REGS 49
@@ -1528,6 +1558,8 @@ static void gdb_set_cpu_pc(GDBState *s, target_ulong pc)
     s->c_cpu->pc = pc;
 #elif defined (TARGET_MIPS)
     s->c_cpu->active_tc.PC = pc;
+#elif defined (TARGET_MICROBLAZE)
+    s->c_cpu->sregs[SR_PC] = pc;
 #elif defined (TARGET_CRIS)
     s->c_cpu->pc = pc;
 #elif defined (TARGET_ALPHA)