[Qemu-commits] [qemu/qemu] 66d4f6: disas: Disassemble all ppc insns for

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[Qemu-commits] [qemu/qemu] 66d4f6: disas: Disassemble all ppc insns for

From:	GitHub
Subject:	[Qemu-commits] [qemu/qemu] 66d4f6: disas: Disassemble all ppc insns for the host
Date:	Mon, 15 Apr 2013 14:00:17 -0700
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 66d4f6a32bf5aa0e3e20c1da11ecc75f8b566899
      
https://github.com/qemu/qemu/commit/66d4f6a32bf5aa0e3e20c1da11ecc75f8b566899
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M disas.c

  Log Message:
  -----------
  disas: Disassemble all ppc insns for the host

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: aceac8d68537b96aa2ef8e8ba246bfaf179975dd
      
https://github.com/qemu/qemu/commit/aceac8d68537b96aa2ef8e8ba246bfaf179975dd
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Use TCGReg everywhere

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 9e555b735c8c0077bcf88ae92d6a0a26c38b437e
      
https://github.com/qemu/qemu/commit/9e555b735c8c0077bcf88ae92d6a0a26c38b437e
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Introduce and use tcg_out_rlw

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 6e5e06024ff722057db928ce5da0b0de64768bc8
      
https://github.com/qemu/qemu/commit/6e5e06024ff722057db928ce5da0b0de64768bc8
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Introduce and use tcg_out_ext32u

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 0a9564b964f2fec444cd422343bc1cc370c60dee
      
https://github.com/qemu/qemu/commit/0a9564b964f2fec444cd422343bc1cc370c60dee
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Introduce and use tcg_out_shli64

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 5e916c287e023c57f05689f908cc4579a6b53245
      
https://github.com/qemu/qemu/commit/5e916c287e023c57f05689f908cc4579a6b53245
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Introduce and use tcg_out_shri64

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 2fd8eddcab144d29f9f58c842ad7a7fd65147394
      
https://github.com/qemu/qemu/commit/2fd8eddcab144d29f9f58c842ad7a7fd65147394
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Introduce and use TAI and SAI

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 752c1fdb6d3e7cc03157af213837f3b081b03858
      
https://github.com/qemu/qemu/commit/752c1fdb6d3e7cc03157af213837f3b081b03858
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Fix setcond_i32

We weren't ignoring the high 32 bits during a NE comparison.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 421233a1469123cc51ddd19849f7db4b6bd380e7
      
https://github.com/qemu/qemu/commit/421233a1469123cc51ddd19849f7db4b6bd380e7
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Cleanup tcg_out_movi

The test for using movi32 was sub-optimal for TCG_TYPE_I32, comparing
a signed 32-bit quantity against an unsigned 32-bit quantity.

When possible, use addi+oris for 32-bit unsigned constants.  Otherwise,
standardize on addi+oris+ori instead of addis+ori+rldicl.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 3d582c6179c853cf27e3c7a19575b6c9b94bd154
      
https://github.com/qemu/qemu/commit/3d582c6179c853cf27e3c7a19575b6c9b94bd154
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Rearrange integer constant constraints

We'll need a zero, and Z makes more sense for that.  Make sure we
have a full compliment of signed and unsigned 16 and 32-bit tests.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: ee924fa6b36330fb2d7c383df6436fcac77e1f23
      
https://github.com/qemu/qemu/commit/ee924fa6b36330fb2d7c383df6436fcac77e1f23
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Improve constant add and sub ops.

Improve constant addition -- previously we'd emit useless addi with 0.
Use new constraints to force the driver to pull full 64-bit constants
into a register.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 148bdd23738a2919dda101908f9cfd94f253ef66
      
https://github.com/qemu/qemu/commit/148bdd23738a2919dda101908f9cfd94f253ef66
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Allow constant first argument to sub

Using SUBFIC for 16-bit signed constants.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: dce74c57bbf9839e72a2f83e3d994d4dd86f93c6
      
https://github.com/qemu/qemu/commit/dce74c57bbf9839e72a2f83e3d994d4dd86f93c6
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Tidy or and xor patterns.

Handle constants in common code; we'll want to reuse that later.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: a9249dff4dc233f9377e7a3025aa124d8941b096
      
https://github.com/qemu/qemu/commit/a9249dff4dc233f9377e7a3025aa124d8941b096
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c
    M tcg/ppc64/tcg-target.h

  Log Message:
  -----------
  tcg-ppc64: Improve and_i32 with constant

Use RLWINM

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 637af30c764e08763e28908d01e5f73efb5e2318
      
https://github.com/qemu/qemu/commit/637af30c764e08763e28908d01e5f73efb5e2318
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Improve and_i64 with constant

Use RLDICL and RLDICR.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 28f2dba6dc451daf462456adc4edfeb3d911fb12
      
https://github.com/qemu/qemu/commit/28f2dba6dc451daf462456adc4edfeb3d911fb12
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c
    M tcg/ppc64/tcg-target.h

  Log Message:
  -----------
  tcg-ppc64: Use automatic implementation of ext32u_i64

The enhancements to and immediate obviate this.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 49d9870a54161b0c2cd29a8b70cf5aa6d3aed469
      
https://github.com/qemu/qemu/commit/49d9870a54161b0c2cd29a8b70cf5aa6d3aed469
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Streamline qemu_ld/st insn selection

Using a table to look up insns of the right width and sign.
Include support for the Power 2.06 LDBRX and STDBRX insns.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 313d91c778e9a2a684d5aacc09750421a6612416
      
https://github.com/qemu/qemu/commit/313d91c778e9a2a684d5aacc09750421a6612416
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c
    M tcg/ppc64/tcg-target.h

  Log Message:
  -----------
  tcg-ppc64: Implement rotates

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 5d221582009d942de77a538d21b09c9120929dc5
      
https://github.com/qemu/qemu/commit/5d221582009d942de77a538d21b09c9120929dc5
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c
    M tcg/ppc64/tcg-target.h

  Log Message:
  -----------
  tcg-ppc64: Implement bswap16 and bswap32

Signed-off-by: Richard Henderson <address@hidden>


  Commit: 68aebd45b1bc13828029e60d12147222ddef3259
      
https://github.com/qemu/qemu/commit/68aebd45b1bc13828029e60d12147222ddef3259
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c
    M tcg/ppc64/tcg-target.h

  Log Message:
  -----------
  tcg-ppc64: Implement bswap64

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: ce1010d6e3080aae0ba597cb9cce07dbf6ec5a5a
      
https://github.com/qemu/qemu/commit/ce1010d6e3080aae0ba597cb9cce07dbf6ec5a5a
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c
    M tcg/ppc64/tcg-target.h

  Log Message:
  -----------
  tcg-ppc64: Implement compound logicals

Mostly copied from the ppc32 port.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 37251b98db28ff606479f53ff59ec0724348c40b
      
https://github.com/qemu/qemu/commit/37251b98db28ff606479f53ff59ec0724348c40b
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Handle constant inputs for some compound logicals

Since we have special code to handle and/or/xor with a constant,
apply the same to andc/orc/eqv with a constant.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 33de9ed2235f8729c36110906c6806b361f96a24
      
https://github.com/qemu/qemu/commit/33de9ed2235f8729c36110906c6806b361f96a24
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c
    M tcg/ppc64/tcg-target.h

  Log Message:
  -----------
  tcg-ppc64: Implement deposit

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: ef809300fcf300a3efef479734e9456dc5b7581c
      
https://github.com/qemu/qemu/commit/ef809300fcf300a3efef479734e9456dc5b7581c
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Use I constraint for mul

The mul_i32 pattern was loading non-16-bit constants into a register,
when we can get the middle-end to do that for us.  The mul_i64 pattern
was not considering that MULLI takes 64-bit inputs.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 4c314da6d1b438c815533380981880fe3f49b1ac
      
https://github.com/qemu/qemu/commit/4c314da6d1b438c815533380981880fe3f49b1ac
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Use TCGType throughout compares

The optimization/bug being fixed is that tcg_out_cmp was not applying the
right type to loading a constant, in the case it can't be implemented
directly.  Rather than recomputing the TCGType enum from the arch64 bool,
pass around the original TCGType throughout.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 991041a4eb8895390d816375021dccfd12c81752
      
https://github.com/qemu/qemu/commit/991041a4eb8895390d816375021dccfd12c81752
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Cleanup i32 constants to tcg_out_cmp

Nothing else in the call chain ensures that these
constants don't have garbage in the high bits.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 6995a4a063d3ab3ceb21aad8c8a78f4cfc5e4140
      
https://github.com/qemu/qemu/commit/6995a4a063d3ab3ceb21aad8c8a78f4cfc5e4140
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Use MFOCRF instead of MFCR

It takes half the cycles to read one CR register instead of all 8.
This is a backward compatible addition to the ISA, so chips prior
to Power 2.00 spec will simply continue to read the entire CR register.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 70fac59a2ae334c5994037b45a76f8dc9f034ab5
      
https://github.com/qemu/qemu/commit/70fac59a2ae334c5994037b45a76f8dc9f034ab5
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Use ISEL for setcond

There are a few simple special cases that should be handled first.
Break these out to subroutines to avoid code duplication.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 027ffea9728704d9e23ae52baf51a1bcfbf34680
      
https://github.com/qemu/qemu/commit/027ffea9728704d9e23ae52baf51a1bcfbf34680
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c
    M tcg/ppc64/tcg-target.h

  Log Message:
  -----------
  tcg-ppc64: Implement movcond

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 1e6e9aca157bb8bc4bef60374e1f584d742e7fb2
      
https://github.com/qemu/qemu/commit/1e6e9aca157bb8bc4bef60374e1f584d742e7fb2
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M configure
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Use getauxval for ISA detection

Glibc 2.16 includes an easy way to get feature bits previously
buried in /proc or the program startup auxiliary vector.  Use it.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 6c858762de60ffff80011251b5fe1ae93cbcd2c8
      
https://github.com/qemu/qemu/commit/6c858762de60ffff80011251b5fe1ae93cbcd2c8
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c
    M tcg/ppc64/tcg-target.h

  Log Message:
  -----------
  tcg-ppc64: Implement add2/sub2_i64

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 6645c147db4bb84b1b24c49be9398be22902923b
      
https://github.com/qemu/qemu/commit/6645c147db4bb84b1b24c49be9398be22902923b
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c
    M tcg/ppc64/tcg-target.h

  Log Message:
  -----------
  tcg-ppc64: Implement mulu2/muls2_i64

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 39dc85b98561ea3de2b029f43a3a2db95c57afa3
      
https://github.com/qemu/qemu/commit/39dc85b98561ea3de2b029f43a3a2db95c57afa3
  Author: Richard Henderson <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M tcg/ppc64/tcg-target.c

  Log Message:
  -----------
  tcg-ppc64: Handle deposit of zero

The TCG optimizer does great work when inserting constants, being able
to fold the open-coded deposit expansion to just an AND or an OR.  Avoid
a bit the regression caused by having the deposit opcode by expanding
deposit of zero as an AND.

Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: e0e367bad7170e264916cdcba4306f79f47bb95c
      
https://github.com/qemu/qemu/commit/e0e367bad7170e264916cdcba4306f79f47bb95c
  Author: Aurelien Jarno <address@hidden>
  Date:   2013-04-15 (Mon, 15 Apr 2013)

  Changed paths:
    M configure
    M disas.c
    M tcg/ppc64/tcg-target.c
    M tcg/ppc64/tcg-target.h

  Log Message:
  -----------
  Merge branch 'tcg-ppc64' of git://github.com/rth7680/qemu

* 'tcg-ppc64' of git://github.com/rth7680/qemu: (33 commits)
  tcg-ppc64: Handle deposit of zero
  tcg-ppc64: Implement mulu2/muls2_i64
  tcg-ppc64: Implement add2/sub2_i64
  tcg-ppc64: Use getauxval for ISA detection
  tcg-ppc64: Implement movcond
  tcg-ppc64: Use ISEL for setcond
  tcg-ppc64: Use MFOCRF instead of MFCR
  tcg-ppc64: Cleanup i32 constants to tcg_out_cmp
  tcg-ppc64: Use TCGType throughout compares
  tcg-ppc64: Use I constraint for mul
  tcg-ppc64: Implement deposit
  tcg-ppc64: Handle constant inputs for some compound logicals
  tcg-ppc64: Implement compound logicals
  tcg-ppc64: Implement bswap64
  tcg-ppc64: Implement bswap16 and bswap32
  tcg-ppc64: Implement rotates
  tcg-ppc64: Streamline qemu_ld/st insn selection
  tcg-ppc64: Use automatic implementation of ext32u_i64
  tcg-ppc64: Improve and_i64 with constant
  tcg-ppc64: Improve and_i32 with constant
  ...


Compare: https://github.com/qemu/qemu/compare/e6b636779b51...e0e367bad717
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