[Qemu-commits] [qemu/qemu] bf439d: pci: Allocate PCIe host bridge PCI ID

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: bf439db4993b02033d4fba8460ca4dc45b15071a
      
https://github.com/qemu/qemu/commit/bf439db4993b02033d4fba8460ca4dc45b15071a
  Author: Alexander Graf <address@hidden>
  Date:   2015-02-13 (Fri, 13 Feb 2015)

  Changed paths:
    M include/hw/pci/pci.h

  Log Message:
  -----------
  pci: Allocate PCIe host bridge PCI ID

We are going to introduce a PCIe host controller that doesn't exist that
way in real hardware, but still needs to expose some PCIe root device which
has PCI IDs.

Allocate a PCI ID in the Red Hat space that we use for other devices of this
kind.

Signed-off-by: Alexander Graf <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 4d8fde1126419c5a858926a457a9b320a27a921a
      
https://github.com/qemu/qemu/commit/4d8fde1126419c5a858926a457a9b320a27a921a
  Author: Alexander Graf <address@hidden>
  Date:   2015-02-13 (Fri, 13 Feb 2015)

  Changed paths:
    M hw/pci-host/Makefile.objs
    A hw/pci-host/gpex.c
    A include/hw/pci-host/gpex.h

  Log Message:
  -----------
  pci: Add generic PCIe host bridge

With simple exposure of MMFG, ioport window, mmio window and an IRQ line we
can successfully create a workable PCIe host bridge that can be mapped anywhere
and only needs to get described to the OS using whatever means it likes.

This patch implements such a "generic" host bridge. It handles 4 legacy IRQ
lines. MSIs need to be handled external to the host bridge.

This device is particularly useful for the "pci-host-ecam-generic" driver in
Linux.

Signed-off-by: Alexander Graf <address@hidden>
Reviewed-by: Claudio Fontana <address@hidden>
Tested-by: Claudio Fontana <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 4ab29b8214cc4b54e0c1a8270b610a340311470e
      
https://github.com/qemu/qemu/commit/4ab29b8214cc4b54e0c1a8270b610a340311470e
  Author: Alexander Graf <address@hidden>
  Date:   2015-02-13 (Fri, 13 Feb 2015)

  Changed paths:
    M default-configs/arm-softmmu.mak
    M hw/arm/virt.c
    M include/sysemu/device_tree.h

  Log Message:
  -----------
  arm: Add PCIe host bridge in virt machine

Now that we have a working "generic" PCIe host bridge driver, we can plug
it into ARM's virt machine to always have PCIe available to normal ARM VMs.

I've successfully managed to expose a Bochs VGA device, XHCI and an e1000
into an AArch64 VM with this and they all lived happily ever after.

Signed-off-by: Alexander Graf <address@hidden>
Tested-by: Claudio Fontana <address@hidden>
[PMM: Squashed in fix for off-by-one error in bus-range DT property
 from Laszlo Ersek <address@hidden>]
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 332261de2b979610aacde22eb15ef6e59f3c2da9
      
https://github.com/qemu/qemu/commit/332261de2b979610aacde22eb15ef6e59f3c2da9
  Author: Alexander Graf <address@hidden>
  Date:   2015-02-13 (Fri, 13 Feb 2015)

  Changed paths:
    M default-configs/alpha-softmmu.mak
    M default-configs/i386-softmmu.mak
    M default-configs/mips-softmmu.mak
    M default-configs/mips64-softmmu.mak
    M default-configs/mips64el-softmmu.mak
    M default-configs/mipsel-softmmu.mak
    M default-configs/pci.mak
    M default-configs/ppc-softmmu.mak
    M default-configs/ppc64-softmmu.mak
    M default-configs/ppcemb-softmmu.mak
    M default-configs/sparc64-softmmu.mak
    M default-configs/x86_64-softmmu.mak

  Log Message:
  -----------
  pci: Move PCI VGA to pci.mak

Every platform that supports PCI can also spawn the Bochs VGA PCI adapter. Move
it to pci.mak to enable it for everyone.

Signed-off-by: Alexander Graf <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: fb8d6c24b095c426151b9bba8c8b0e58b03d6503
      
https://github.com/qemu/qemu/commit/fb8d6c24b095c426151b9bba8c8b0e58b03d6503
  Author: Greg Bellows <address@hidden>
  Date:   2015-02-13 (Fri, 13 Feb 2015)

  Changed paths:
    M target-arm/cpu.c
    M target-arm/cpu64.c

  Log Message:
  -----------
  target-arm: Add CPU property to disable AArch64

Adds registration and get/set functions for enabling/disabling the AArch64
execution state on AArch64 CPUs.  By default AArch64 execution state is enabled
on AArch64 CPUs, setting the property to off, will disable the execution state.
The below QEMU invocation would have AArch64 execution state disabled.

    $ ./qemu-system-aarch64 -machine virt -cpu cortex-a57,aarch64=off

Also adds stripping of features from CPU model string in acquiring the ARM CPU
by name.

Signed-off-by: Greg Bellows <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: f313369fdb78f849ecbbd8e5d88f01ddf38786c8
      
https://github.com/qemu/qemu/commit/f313369fdb78f849ecbbd8e5d88f01ddf38786c8
  Author: Greg Bellows <address@hidden>
  Date:   2015-02-13 (Fri, 13 Feb 2015)

  Changed paths:
    M hw/arm/virt.c

  Log Message:
  -----------
  target-arm: Add feature parsing to virt

Added machvirt parsing of feature keywords added to the -cpu command line
option.  Parsing occurs during machine initialization.

Signed-off-by: Greg Bellows <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ce02049dbf1828b4bc77d921b108a9d84246e5aa
      
https://github.com/qemu/qemu/commit/ce02049dbf1828b4bc77d921b108a9d84246e5aa
  Author: Greg Bellows <address@hidden>
  Date:   2015-02-13 (Fri, 13 Feb 2015)

  Changed paths:
    M target-arm/cpu.h
    M target-arm/helper-a64.c
    M target-arm/helper.c
    M target-arm/op_helper.c

  Log Message:
  -----------
  target-arm: Add 32/64-bit register sync

Add AArch32 to AArch64 register sychronization functions.
Replace manual register synchronization with new functions in
aarch64_cpu_do_interrupt() and HELPER(exception_return)().

Signed-off-by: Greg Bellows <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 560739702764d4882662f0e70b584fa5dff7241a
      
https://github.com/qemu/qemu/commit/560739702764d4882662f0e70b584fa5dff7241a
  Author: Greg Bellows <address@hidden>
  Date:   2015-02-13 (Fri, 13 Feb 2015)

  Changed paths:
    M target-arm/kvm64.c

  Log Message:
  -----------
  target-arm: Add AArch32 guest support to KVM64

Add 32-bit to/from 64-bit register synchronization on register gets and puts.
Set EL1_32BIT feature flag passed to KVM

Signed-off-by: Greg Bellows <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 1743d55c8b38bcee632cf6eb2de81131635bb3d2
      
https://github.com/qemu/qemu/commit/1743d55c8b38bcee632cf6eb2de81131635bb3d2
  Author: Peter Maydell <address@hidden>
  Date:   2015-02-13 (Fri, 13 Feb 2015)

  Changed paths:
    M target-arm/translate-a64.c

  Log Message:
  -----------
  target-arm: A64: Fix shifts into sign bit

Fix attempts to shift into the sign bit of an int, which is undefined
behaviour in C and warned about by the clang sanitizer.

Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden


  Commit: e167adc9d9f5df4f8109aecd4552c407fdce094a
      
https://github.com/qemu/qemu/commit/e167adc9d9f5df4f8109aecd4552c407fdce094a
  Author: Peter Maydell <address@hidden>
  Date:   2015-02-13 (Fri, 13 Feb 2015)

  Changed paths:
    M target-arm/translate-a64.c

  Log Message:
  -----------
  target-arm: A64: Fix handling of rotate in logic_imm_decode_wmask

The code in logic_imm_decode_wmask attempts to rotate a mask
value within the bottom 'e' bits of the value with
    mask = (mask >> r) | (mask << (e - r));
This has two issues:
 * if the element size is 64 then a rotate by zero results
   in a shift left by 64, which is undefined behaviour
 * if the element size is smaller than 64 then this will
   leave junk in the value at bit 'e' and above, which is
   not valid input to bitfield_replicate(). As it happens,
   the bits at bit 'e' to '2e - r' are exactly the ones
   which bitfield_replicate is going to copy in there,
   so this isn't a "wrong code generated" bug, but it's
   confusing and if we ever put an assert in
   bitfield_replicate it would fire on valid guest code.

Fix the former by not doing anything if r is zero, and
the latter by masking with bitmask64(e).

Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden


  Commit: 037e1d009e2fcb80784d37f0e12aa999787d46d4
      
https://github.com/qemu/qemu/commit/037e1d009e2fcb80784d37f0e12aa999787d46d4
  Author: Peter Maydell <address@hidden>
  Date:   2015-02-13 (Fri, 13 Feb 2015)

  Changed paths:
    M target-arm/translate-a64.c

  Log Message:
  -----------
  target-arm: A64: Avoid left shifting negative integers in disas_pc_rel_addr

Shifting a negative integer left is undefined behaviour in C.
Avoid it by assembling and shifting the offset fields as
unsigned values and then sign extending as the final action.

Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden


  Commit: c2ebd862a54b7e12175d65c03ba259926cb2237a
      
https://github.com/qemu/qemu/commit/c2ebd862a54b7e12175d65c03ba259926cb2237a
  Author: Peter Maydell <address@hidden>
  Date:   2015-02-13 (Fri, 13 Feb 2015)

  Changed paths:
    M target-arm/translate-a64.c

  Log Message:
  -----------
  target-arm: A64: Avoid signed shifts in disas_ldst_pair()

Avoid shifting potentially negative signed offset values in
disas_ldst_pair() by keeping the offset in a uint64_t rather
than an int64_t.

Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden


  Commit: e344e7afc1a04ab11c843c069cef0cdcc1c7787e
      
https://github.com/qemu/qemu/commit/e344e7afc1a04ab11c843c069cef0cdcc1c7787e
  Author: Peter Maydell <address@hidden>
  Date:   2015-02-13 (Fri, 13 Feb 2015)

  Changed paths:
    M default-configs/alpha-softmmu.mak
    M default-configs/arm-softmmu.mak
    M default-configs/i386-softmmu.mak
    M default-configs/mips-softmmu.mak
    M default-configs/mips64-softmmu.mak
    M default-configs/mips64el-softmmu.mak
    M default-configs/mipsel-softmmu.mak
    M default-configs/pci.mak
    M default-configs/ppc-softmmu.mak
    M default-configs/ppc64-softmmu.mak
    M default-configs/ppcemb-softmmu.mak
    M default-configs/sparc64-softmmu.mak
    M default-configs/x86_64-softmmu.mak
    M hw/arm/virt.c
    M hw/pci-host/Makefile.objs
    A hw/pci-host/gpex.c
    A include/hw/pci-host/gpex.h
    M include/hw/pci/pci.h
    M include/sysemu/device_tree.h
    M target-arm/cpu.c
    M target-arm/cpu.h
    M target-arm/cpu64.c
    M target-arm/helper-a64.c
    M target-arm/helper.c
    M target-arm/kvm64.c
    M target-arm/op_helper.c
    M target-arm/translate-a64.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150213' 
into staging

target-arm queue:
 * PCIe support in virt board
 * Support 32-bit guests on 64-bit KVM hosts in virt board
 * Fixes to avoid C undefined behaviour

# gpg: Signature made Fri 13 Feb 2015 05:53:07 GMT using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <address@hidden>"

* remotes/pmaydell/tags/pull-target-arm-20150213:
  target-arm: A64: Avoid signed shifts in disas_ldst_pair()
  target-arm: A64: Avoid left shifting negative integers in disas_pc_rel_addr
  target-arm: A64: Fix handling of rotate in logic_imm_decode_wmask
  target-arm: A64: Fix shifts into sign bit
  target-arm: Add AArch32 guest support to KVM64
  target-arm: Add 32/64-bit register sync
  target-arm: Add feature parsing to virt
  target-arm: Add CPU property to disable AArch64
  pci: Move PCI VGA to pci.mak
  arm: Add PCIe host bridge in virt machine
  pci: Add generic PCIe host bridge
  pci: Allocate PCIe host bridge PCI ID

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/449008f86418...e344e7afc1a0