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[Qemu-commits] [qemu/qemu] 253108: hw/intc/arm_gic: add tracepoints
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Subject: |
[Qemu-commits] [qemu/qemu] 253108: hw/intc/arm_gic: add tracepoints |
Date: |
Tue, 17 May 2016 07:00:05 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 2531088f6c1ce1f620f8d5a545f0af95598e69fc
https://github.com/qemu/qemu/commit/2531088f6c1ce1f620f8d5a545f0af95598e69fc
Author: Hollis Blanchard <address@hidden>
Date: 2016-05-16 (Mon, 16 May 2016)
Changed paths:
M hw/intc/arm_gic.c
M trace-events
Log Message:
-----------
hw/intc/arm_gic: add tracepoints
These are obviously critical to understanding interrupt delivery:
gic_enable_irq
gic_disable_irq
gic_set_irq (inbound irq from device models)
gic_update_set_irq (outbound irq to CPU)
gic_acknowledge_irq
The only one that I think might raise eyebrows is gic_update_bestirq, but I've
(sadly) debugged problems that ended up being caused by unexpected priorities.
Knowing that the GIC has an irq ready, but doesn't deliver to the CPU due to
priority, has also proven important.
Signed-off-by: Hollis Blanchard <address@hidden>
Message-id: address@hidden
Signed-off-by: Stefan Hajnoczi <address@hidden>
Commit: 5a3fd960f39c17cef5ffa8703652bea3828bbe48
https://github.com/qemu/qemu/commit/5a3fd960f39c17cef5ffa8703652bea3828bbe48
Author: Peter Maydell <address@hidden>
Date: 2016-05-17 (Tue, 17 May 2016)
Changed paths:
M hw/intc/arm_gic.c
M trace-events
Log Message:
-----------
Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request'
into staging
# gpg: Signature made Tue 17 May 2016 14:06:54 BST using RSA key ID 81AB73C8
# gpg: Good signature from "Stefan Hajnoczi <address@hidden>"
# gpg: aka "Stefan Hajnoczi <address@hidden>"
* remotes/stefanha/tags/tracing-pull-request:
hw/intc/arm_gic: add tracepoints
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/3f5e34a45c78...5a3fd960f39c
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