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[Qemu-commits] [qemu/qemu] d1fd31: RISC-V: Fix riscv_isa_string memory s
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[Qemu-commits] [qemu/qemu] d1fd31: RISC-V: Fix riscv_isa_string memory size bug |
Date: |
Tue, 20 Mar 2018 05:55:57 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: d1fd31f82219c306aed7c35c370852d2f8d331a8
https://github.com/qemu/qemu/commit/d1fd31f82219c306aed7c35c370852d2f8d331a8
Author: Michael Clark <address@hidden>
Date: 2018-03-20 (Tue, 20 Mar 2018)
Changed paths:
M target/riscv/cpu.c
Log Message:
-----------
RISC-V: Fix riscv_isa_string memory size bug
This version uses a constant size memory buffer sized for
the maximum possible ISA string length. It also uses g_new
instead of g_new0, uses more efficient logic to append
extensions and adds manual zero termination of the string.
Cc: Palmer Dabbelt <address@hidden>
Cc: Peter Maydell <address@hidden>
Signed-off-by: Michael Clark <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
[PMM: Use qemu_tolower() rather than tolower()]
Signed-off-by: Peter Maydell <address@hidden>
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