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[Qemu-commits] [qemu/qemu] e65a5f: tcg/aarch64: limit mul_vec size

From: GitHub
Subject: [Qemu-commits] [qemu/qemu] e65a5f: tcg/aarch64: limit mul_vec size
Date: Fri, 20 Jul 2018 03:58:33 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: e65a5f227d77a5dbae7a7123c3ee915ee4bd80cf
  Author: Alex Bennée <address@hidden>
  Date:   2018-07-19 (Thu, 19 Jul 2018)

  Changed paths:
    M tcg/aarch64/tcg-target.inc.c

  Log Message:
  tcg/aarch64: limit mul_vec size

In AdvSIMD we can only do 32x32 integer multiples although SVE is
capable of larger 64 bit multiples. As a result we can end up
generating invalid opcodes. Fix this by only reprting we can emit
mul vector ops if the size is small enough.

Fixes a crash on:


When running on AArch64 hardware.

Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Alex Bennée <address@hidden>
Message-Id: <address@hidden>
[rth: Removed the tcg_debug_assert -- there are plenty of other
cases that we do not diagnose within the insn encoding helpers.]
Signed-off-by: Richard Henderson <address@hidden>

  Commit: 5b3ecd3d941a0ae8a8cfbba5ab8139b2bf104822
  Author: Peter Maydell <address@hidden>
  Date:   2018-07-20 (Fri, 20 Jul 2018)

  Changed paths:
    M tcg/aarch64/tcg-target.inc.c

  Log Message:
  Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20180719' into staging

Fix aarch64 host vector mul

# gpg: Signature made Fri 20 Jul 2018 04:58:32 BST
# gpg:                using RSA key 64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <address@hidden>"
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-tcg-20180719:
  tcg/aarch64: limit mul_vec size

Signed-off-by: Peter Maydell <address@hidden>

Compare: https://github.com/qemu/qemu/compare/9d5d247e32ae...5b3ecd3d941a
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