[Qemu-commits] [qemu/qemu] 4872fe: MAINTAINERS: Update target/mips maint

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[Qemu-commits] [qemu/qemu] 4872fe: MAINTAINERS: Update target/mips maint

From:	GitHub
Subject:	[Qemu-commits] [qemu/qemu] 4872fe: MAINTAINERS: Update target/mips maintainer's email...
Date:	Fri, 17 Aug 2018 01:45:32 -0700
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 4872fee23dc690026644e9a44ae340c9fb5130ee
      
https://github.com/qemu/qemu/commit/4872fee23dc690026644e9a44ae340c9fb5130ee
  Author: Aleksandar Markovic <address@hidden>
  Date:   2018-08-16 (Thu, 16 Aug 2018)

  Changed paths:
    M .mailmap
    M MAINTAINERS

  Log Message:
  -----------
  MAINTAINERS: Update target/mips maintainer's email addresses

Update email addresses of Aleksandar Markovic and Paul Burton in the
MAINTAINERS file. Also, add corresponding items in the .mailmap file.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>


  Commit: c2e19f3c2b1a1bb5f4fc3c55ee8cfa28dde9b810
      
https://github.com/qemu/qemu/commit/c2e19f3c2b1a1bb5f4fc3c55ee8cfa28dde9b810
  Author: Aleksandar Markovic <address@hidden>
  Date:   2018-08-16 (Thu, 16 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Avoid case statements formulated by ranges - part 1

Remove "range style" case statements to make code analysis easier.

This is needed also for some upcoming nanoMIPS-related refactorings.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>


  Commit: c38a1d52233c85976eeed99c9015e881de8cd68e
      
https://github.com/qemu/qemu/commit/c38a1d52233c85976eeed99c9015e881de8cd68e
  Author: Aleksandar Rikalo <address@hidden>
  Date:   2018-08-16 (Thu, 16 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Avoid case statements formulated by ranges - part 2

Remove "range style" case statements to make code analysis easier.
This patch handles cases when the values in the range in question
were not properly defined.

Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 146dd620db815558938433eb9f57a571d424d2c6
      
https://github.com/qemu/qemu/commit/146dd620db815558938433eb9f57a571d424d2c6
  Author: Aleksandar Markovic <address@hidden>
  Date:   2018-08-16 (Thu, 16 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Mark switch fallthroughs with interpretable comments

Mark switch fallthroughs with comments, in cases fallthroughs
are intentional.

The comments "/* fall through */" are interpreted by compilers and
other tools, and they will not issue warnings in such cases. For gcc,
the warning is turnend on by -Wimplicit-fallthrough. With this patch,
there will be no such warnings in target/mips directory. If such
warning appears in future, it should be checked if it is intentional,
and, if yes, marked with a comment similar to those from this patch.

The comment must be just before next "case", otherwise gcc won't
understand it.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: e1555d7ddf2c86fb92165e47eb092f1f5fa9e8bd
      
https://github.com/qemu/qemu/commit/e1555d7ddf2c86fb92165e47eb092f1f5fa9e8bd
  Author: Aleksandar Markovic <address@hidden>
  Date:   2018-08-16 (Thu, 16 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Fix two instances of shadow variables

Fix two instances of shadow variables. This cleans up entire file
translate.c from shadow variables.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 0413d7a55a8161ebd33541ba1df4285bf180c583
      
https://github.com/qemu/qemu/commit/0413d7a55a8161ebd33541ba1df4285bf180c583
  Author: Aleksandar Markovic <address@hidden>
  Date:   2018-08-16 (Thu, 16 Aug 2018)

  Changed paths:
    M target/mips/cpu.h

  Log Message:
  -----------
  target/mips: Update some CP0 registers bit definitions

Update CP0 registers Config0, Config1, Config2, Config3,
Config4, and Config5 bit definitions.

Some of these bits will be utilized by upcoming nanoMIPS changes.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>


  Commit: 25beba9bf76a677747b779e997c6540677a38311
      
https://github.com/qemu/qemu/commit/25beba9bf76a677747b779e997c6540677a38311
  Author: Stefan Markovic <address@hidden>
  Date:   2018-08-16 (Thu, 16 Aug 2018)

  Changed paths:
    M target/mips/cpu.h
    M target/mips/machine.c
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Add CP0 BadInstrX register

Add CP0 BadInstrX register. This register will be used in nanoMIPS.

Reviewed-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>


  Commit: fa192d4974de3ace960d03803ab9d2f09abd9282
      
https://github.com/qemu/qemu/commit/fa192d4974de3ace960d03803ab9d2f09abd9282
  Author: Stefan Markovic <address@hidden>
  Date:   2018-08-16 (Thu, 16 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Implement CP0 Config1.WR bit functionality

Add testing Config1.WR bit into watch exception handling logic.

Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: e807bcc1513f2d79c992a08b252fa32e69c6e8b2
      
https://github.com/qemu/qemu/commit/e807bcc1513f2d79c992a08b252fa32e69c6e8b2
  Author: Yongbok Kim <address@hidden>
  Date:   2018-08-16 (Thu, 16 Aug 2018)

  Changed paths:
    M target/mips/helper.c
    M target/mips/op_helper.c

  Log Message:
  -----------
  target/mips: Don't update BadVAddr register in Debug Mode

BadVAddr should not be updated if (env->hflags & MIPS_HFLAG_DM) is
set.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>


  Commit: 59488dda1f16c0259bc2610d8d71686ef436c649
      
https://github.com/qemu/qemu/commit/59488dda1f16c0259bc2610d8d71686ef436c649
  Author: Yongbok Kim <address@hidden>
  Date:   2018-08-16 (Thu, 16 Aug 2018)

  Changed paths:
    M target/mips/translate.c

  Log Message:
  -----------
  target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0

MFHC0 and MTHC0 used to handle EntryLo0 and EntryLo1 registers only,
and placing ELPA flag checks before switch statement were technically
correct. However, after adding handling more registers, these checks
should be moved to act only in cases of handling EntryLo0 and
EntryLo1.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: c19fd07ee5fbf1100f9f1890543e9de832d6e9c6
      
https://github.com/qemu/qemu/commit/c19fd07ee5fbf1100f9f1890543e9de832d6e9c6
  Author: Aleksandar Markovic <address@hidden>
  Date:   2018-08-16 (Thu, 16 Aug 2018)

  Changed paths:
    M include/elf.h

  Log Message:
  -----------
  elf: Remove duplicate preprocessor constant definition

Remove duplicate preprocessor constant definition for EF_MIPS_ARCH.

The duplicate was introduced in commit 45506bdd. It placed the
constant EF_MIPS_ARCH in a better place, however it did not remove
the original. This patch removes the original occurrence.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>


  Commit: c20eafa19775e6b75810b827e67d98f97eb6afdb
      
https://github.com/qemu/qemu/commit/c20eafa19775e6b75810b827e67d98f97eb6afdb
  Author: Aleksandar Markovic <address@hidden>
  Date:   2018-08-16 (Thu, 16 Aug 2018)

  Changed paths:
    M include/elf.h

  Log Message:
  -----------
  elf: Add ELF flags for MIPS machine variants

Add MIPS machine variants ELF flags so that the emulation behavior
can be adjusted if needed.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 977324ac8c61b7983ae977333dc615f1d4697eea
      
https://github.com/qemu/qemu/commit/977324ac8c61b7983ae977333dc615f1d4697eea
  Author: Aleksandar Markovic <address@hidden>
  Date:   2018-08-16 (Thu, 16 Aug 2018)

  Changed paths:
    M linux-user/mips/syscall_nr.h
    M linux-user/mips64/syscall_nr.h

  Log Message:
  -----------
  linux-user: Update MIPS syscall numbers up to kernel 4.18 headers

Synchronize content of linux-user/mips/syscall_nr.h and
linux-user/mips64/syscall_nr.h with Linux kernel 4.18 headers.
This adds 9 new syscall numbers, the last being NR_io_pgetevents.

Reviewed-by: Laurent Vivier <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 4f7f892420b4a5333b59d15068e5d8e97f9899c8
      
https://github.com/qemu/qemu/commit/4f7f892420b4a5333b59d15068e5d8e97f9899c8
  Author: Aleksandar Rikalo <address@hidden>
  Date:   2018-08-16 (Thu, 16 Aug 2018)

  Changed paths:
    M linux-user/strace.c
    M linux-user/syscall.c

  Log Message:
  -----------
  linux-user: Add preprocessor availability control to some syscalls

Add ability to target platforms to individually include user-mode
support for system calls from "stat" group of system calls.

This change is related to new nanoMIPS platform in the sense that
it supports a different set of "stat" system calls than any other
target. nanoMIPS does not support structures stat and stat64 at
all. Also, support for certain number of other system calls is
dropped in nanoMIPS (those are most of the time obsoleted system
calls).

Without this patch, build for nanoMIPS would fail.

Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: 8639c5c95472ee79391a7e7826d1af23948b71f6
      
https://github.com/qemu/qemu/commit/8639c5c95472ee79391a7e7826d1af23948b71f6
  Author: Aleksandar Markovic <address@hidden>
  Date:   2018-08-16 (Thu, 16 Aug 2018)

  Changed paths:
    M qemu-doc.texi

  Log Message:
  -----------
  qemu-doc: Amend MIPS-related items

Amend MIPS-related items in qemu-doc.texi

Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>


  Commit: b8f7ff1e10b4d03555d6a5da011c2aae10063ab8
      
https://github.com/qemu/qemu/commit/b8f7ff1e10b4d03555d6a5da011c2aae10063ab8
  Author: Peter Maydell <address@hidden>
  Date:   2018-08-16 (Thu, 16 Aug 2018)

  Changed paths:
    M .mailmap
    M MAINTAINERS
    M include/elf.h
    M linux-user/mips/syscall_nr.h
    M linux-user/mips64/syscall_nr.h
    M linux-user/strace.c
    M linux-user/syscall.c
    M qemu-doc.texi
    M target/mips/cpu.h
    M target/mips/helper.c
    M target/mips/machine.c
    M target/mips/op_helper.c
    M target/mips/translate.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-aug-2018' 
into staging

MIPS queue Aug 16, 2018

# gpg: Signature made Thu 16 Aug 2018 18:19:36 BST
# gpg:                using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <address@hidden>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01  DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-aug-2018:
  qemu-doc: Amend MIPS-related items
  linux-user: Add preprocessor availability control to some syscalls
  linux-user: Update MIPS syscall numbers up to kernel 4.18 headers
  elf: Add ELF flags for MIPS machine variants
  elf: Remove duplicate preprocessor constant definition
  target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0
  target/mips: Don't update BadVAddr register in Debug Mode
  target/mips: Implement CP0 Config1.WR bit functionality
  target/mips: Add CP0 BadInstrX register
  target/mips: Update some CP0 registers bit definitions
  target/mips: Fix two instances of shadow variables
  target/mips: Mark switch fallthroughs with interpretable comments
  target/mips: Avoid case statements formulated by ranges - part 2
  target/mips: Avoid case statements formulated by ranges - part 1
  MAINTAINERS: Update target/mips maintainer's email addresses

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/bb16c0412a57...b8f7ff1e10b4
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