[Qemu-commits] [qemu/qemu] 1cb169: hw/ssi/npcm7xx_fiu: Fix handling of unsigned integer

[Peter Maydell]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 1cb169b27a7e78176de2101ce7c0a577945c8dec
      
https://github.com/qemu/qemu/commit/1cb169b27a7e78176de2101ce7c0a577945c8dec
  Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
  Date:   2020-10-08 (Thu, 08 Oct 2020)

  Changed paths:
    M hw/ssi/npcm7xx_fiu.c
    M hw/ssi/trace-events

  Log Message:
  -----------
  hw/ssi/npcm7xx_fiu: Fix handling of unsigned integer

Fix integer handling issues handling issue reported by Coverity:

  hw/ssi/npcm7xx_fiu.c: 162 in npcm7xx_fiu_flash_read()
  >>>     CID 1432730:  Integer handling issues  (NEGATIVE_RETURNS)
  >>>     "npcm7xx_fiu_cs_index(fiu, f)" is passed to a parameter that cannot 
be negative.
  162         npcm7xx_fiu_select(fiu, npcm7xx_fiu_cs_index(fiu, f));

  hw/ssi/npcm7xx_fiu.c: 221 in npcm7xx_fiu_flash_write()
  218         cs_id = npcm7xx_fiu_cs_index(fiu, f);
  219         trace_npcm7xx_fiu_flash_write(DEVICE(fiu)->canonical_path, cs_id, 
addr,
  220                                       size, v);
  >>>     CID 1432729:  Integer handling issues  (NEGATIVE_RETURNS)
  >>>     "cs_id" is passed to a parameter that cannot be negative.
  221         npcm7xx_fiu_select(fiu, cs_id);

Since the index of the flash can not be negative, return an
unsigned type.

Reported-by: Coverity (CID 1432729 & 1432730: NEGATIVE_RETURNS)
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com>
Message-id: 20200919132435.310527-1-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 1ef6a40608f8e20cb39762a9eeaa29d135310244
      
https://github.com/qemu/qemu/commit/1ef6a40608f8e20cb39762a9eeaa29d135310244
  Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
  Date:   2020-10-08 (Thu, 08 Oct 2020)

  Changed paths:
    M include/hw/arm/fsl-imx25.h

  Log Message:
  -----------
  hw/arm/fsl-imx25: Fix a typo

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201002080935.1660005-1-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: b8bf3472ccb4e5265dc6ec148a38f4b4dd5ac896
      
https://github.com/qemu/qemu/commit/b8bf3472ccb4e5265dc6ec148a38f4b4dd5ac896
  Author: Graeme Gregory <graeme@nuviainc.com>
  Date:   2020-10-08 (Thu, 08 Oct 2020)

  Changed paths:
    M hw/arm/sbsa-ref.c

  Log Message:
  -----------
  hw/arm/sbsa-ref : Fix SMMUv3 Initialisation

SMMUv3 has an error in a previous patch where an i was transposed to a 1
meaning interrupts would not have been correctly assigned to the SMMUv3
instance.

Fixes: 48ba18e6d3f3 ("hw/arm/sbsa-ref: Simplify by moving the gic in the 
machine state")
Signed-off-by: Graeme Gregory <graeme@nuviainc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20201007100732.4103790-2-graeme@nuviainc.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 04788fd5c5577cbe5fb61107cdd9732479c793ca
      
https://github.com/qemu/qemu/commit/04788fd5c5577cbe5fb61107cdd9732479c793ca
  Author: Graeme Gregory <graeme@nuviainc.com>
  Date:   2020-10-08 (Thu, 08 Oct 2020)

  Changed paths:
    M hw/arm/sbsa-ref.c

  Log Message:
  -----------
  hw/arm/sbsa-ref : allocate IRQs for SMMUv3

Original commit did not allocate IRQs for the SMMUv3 in the irqmap
effectively using irq 0->3 (shared with other devices). Assuming
original intent was to allocate unique IRQs then add an allocation
to the irqmap.

Fixes: e9fdf453240 ("hw/arm: Add arm SBSA reference machine, devices part")
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Graeme Gregory <graeme@nuviainc.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20201007100732.4103790-3-graeme@nuviainc.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 3059344f01e1bf9625570ef2e8396fa011e9431d
      
https://github.com/qemu/qemu/commit/3059344f01e1bf9625570ef2e8396fa011e9431d
  Author: Philippe Mathieu-Daudé <f4bug@amsat.org>
  Date:   2020-10-08 (Thu, 08 Oct 2020)

  Changed paths:
    M hw/char/bcm2835_aux.c

  Log Message:
  -----------
  hw/char/bcm2835_aux: Allow less than 32-bit accesses

The "BCM2835 ARM Peripherals" datasheet [*] chapter 2
("Auxiliaries: UART1 & SPI1, SPI2"), list the register
sizes as 3/8/16/32 bits. We assume this means this
peripheral allows 8-bit accesses.

This was not an issue until commit 5d971f9e67 which reverted
("memory: accept mismatching sizes in memory_region_access_valid").

The model is implemented as 32-bit accesses (see commit 97398d900c,
all registers are 32-bit) so replace MemoryRegionOps.valid as
MemoryRegionOps.impl, and re-introduce MemoryRegionOps.valid
with a 8/32-bit range.

[*] https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf

Fixes: 97398d900c ("bcm2835_aux: add emulation of BCM2835 AUX (aka UART1) 
block")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201002181032.1899463-1-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 94c7fefcb456b0b26f04b30e6df54a0c872e862d
      
https://github.com/qemu/qemu/commit/94c7fefcb456b0b26f04b30e6df54a0c872e862d
  Author: Andrew Jones <drjones@redhat.com>
  Date:   2020-10-08 (Thu, 08 Oct 2020)

  Changed paths:
    M linux-headers/linux/kvm.h

  Log Message:
  -----------
  linux headers: sync to 5.9-rc7

Update against Linux 5.9-rc7.

Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>
Message-id: 20201001061718.101915-2-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 281a3c330e0d694ce4f364fa0f74738ac4afd6dc
      
https://github.com/qemu/qemu/commit/281a3c330e0d694ce4f364fa0f74738ac4afd6dc
  Author: Andrew Jones <drjones@redhat.com>
  Date:   2020-10-08 (Thu, 08 Oct 2020)

  Changed paths:
    M target/arm/kvm_arm.h

  Log Message:
  -----------
  target/arm/kvm: Make uncalled stubs explicitly unreachable

When we compile without KVM support !defined(CONFIG_KVM) we generate
stubs for functions that the linker will still encounter. Sometimes
these stubs can be executed safely and are placed in paths where they
get executed with or without KVM. Other functions should never be
called without KVM. Those functions should be guarded by kvm_enabled(),
but should also be robust to refactoring mistakes. Putting a
g_assert_not_reached() in the function should help. Additionally,
the g_assert_not_reached() calls may actually help the linker remove
some code.

We remove the stubs for kvm_arm_get/put_virtual_time(), as they aren't
necessary at all - the only caller is in kvm.c

Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>
Message-id: 20201001061718.101915-3-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: fe11f058c5fda70360f810e7bddd4b6d69f76230
      
https://github.com/qemu/qemu/commit/fe11f058c5fda70360f810e7bddd4b6d69f76230
  Author: Andrew Jones <drjones@redhat.com>
  Date:   2020-10-08 (Thu, 08 Oct 2020)

  Changed paths:
    M hw/arm/virt.c

  Log Message:
  -----------
  hw/arm/virt: Move post cpu realize check into its own function

We'll add more to this new function in coming patches so we also
state the gic must be created and call it below create_gic().

No functional change intended.

Reviewed-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andrew Jones <drjones@redhat.com>
Message-id: 20201001061718.101915-4-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 946f1bb18c342fa548f9c0f52f64836ff49d99c8
      
https://github.com/qemu/qemu/commit/946f1bb18c342fa548f9c0f52f64836ff49d99c8
  Author: Andrew Jones <drjones@redhat.com>
  Date:   2020-10-08 (Thu, 08 Oct 2020)

  Changed paths:
    M hw/arm/virt.c

  Log Message:
  -----------
  hw/arm/virt: Move kvm pmu setup to virt_cpu_post_init

Move the KVM PMU setup part of fdt_add_pmu_nodes() to
virt_cpu_post_init(), which is a more appropriate location. Now
fdt_add_pmu_nodes() is also named more appropriately, because it
no longer does anything but fdt node creation.

No functional change intended.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>
Message-id: 20201001061718.101915-5-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 05889d15d1c95163de917800cf0e1bf6faab1bc7
      
https://github.com/qemu/qemu/commit/05889d15d1c95163de917800cf0e1bf6faab1bc7
  Author: Andrew Jones <drjones@redhat.com>
  Date:   2020-10-08 (Thu, 08 Oct 2020)

  Changed paths:
    M tests/qtest/meson.build

  Log Message:
  -----------
  tests/qtest: Restore aarch64 arm-cpu-features test

arm-cpu-features got dropped from the AArch64 tests during the meson
conversion shuffle.

Signed-off-by: Andrew Jones <drjones@redhat.com>
Message-id: 20201001061718.101915-6-drjones@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 68970d1e0d07e3a266141bbd9038fd9890ca88f2
      
https://github.com/qemu/qemu/commit/68970d1e0d07e3a266141bbd9038fd9890ca88f2
  Author: Andrew Jones <drjones@redhat.com>
  Date:   2020-10-08 (Thu, 08 Oct 2020)

  Changed paths:
    M docs/system/arm/cpu-features.rst
    M hw/arm/virt.c
    M include/hw/arm/virt.h
    M target/arm/cpu.c
    M target/arm/cpu.h
    M target/arm/kvm.c
    M target/arm/kvm64.c
    M target/arm/kvm_arm.h
    M target/arm/monitor.c
    M tests/qtest/arm-cpu-features.c

  Log Message:
  -----------
  hw/arm/virt: Implement kvm-steal-time

We add the kvm-steal-time CPU property and implement it for machvirt.
A tiny bit of refactoring was also done to allow pmu and pvtime to
use the same vcpu device helper functions.

Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Andrew Jones <drjones@redhat.com>
Message-id: 20201001061718.101915-7-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: d1b6b7017572e8d82f26eb827a1dba0e8cf3cae6
      
https://github.com/qemu/qemu/commit/d1b6b7017572e8d82f26eb827a1dba0e8cf3cae6
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2020-10-08 (Thu, 08 Oct 2020)

  Changed paths:
    M target/arm/cpu64.c

  Log Message:
  -----------
  target/arm: Make '-cpu max' have a 48-bit PA

QEMU supports a 48-bit physical address range, but we don't currently
expose it in the '-cpu max' ID registers (you get the same range as
Cortex-A57, which is 44 bits).

Set the ID_AA64MMFR0.PARange field to indicate 48 bits.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201001160116.18095-1-peter.maydell@linaro.org


  Commit: 497d415d76b9f59fcae27f22df1ca2c3fa4df64e
      
https://github.com/qemu/qemu/commit/497d415d76b9f59fcae27f22df1ca2c3fa4df64e
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2020-10-08 (Thu, 08 Oct 2020)

  Changed paths:
    M docs/system/arm/cpu-features.rst
    M hw/arm/sbsa-ref.c
    M hw/arm/virt.c
    M hw/char/bcm2835_aux.c
    M hw/ssi/npcm7xx_fiu.c
    M hw/ssi/trace-events
    M include/hw/arm/fsl-imx25.h
    M include/hw/arm/virt.h
    M linux-headers/linux/kvm.h
    M target/arm/cpu.c
    M target/arm/cpu.h
    M target/arm/cpu64.c
    M target/arm/kvm.c
    M target/arm/kvm64.c
    M target/arm/kvm_arm.h
    M target/arm/monitor.c
    M tests/qtest/arm-cpu-features.c
    M tests/qtest/meson.build

  Log Message:
  -----------
  Merge remote-tracking branch 
'remotes/pmaydell/tags/pull-target-arm-20201008-1' into staging

target-arm queue:
 * hw/ssi/npcm7xx_fiu: Fix handling of unsigned integer
 * hw/arm/fsl-imx25: Fix a typo
 * hw/arm/sbsa-ref : Fix SMMUv3 Initialisation
 * hw/arm/sbsa-ref : allocate IRQs for SMMUv3
 * hw/char/bcm2835_aux: Allow less than 32-bit accesses
 * hw/arm/virt: Implement kvm-steal-time
 * target/arm: Make '-cpu max' have a 48-bit PA

# gpg: Signature made Thu 08 Oct 2020 21:40:31 BST
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" 
[ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20201008-1:
  target/arm: Make '-cpu max' have a 48-bit PA
  hw/arm/virt: Implement kvm-steal-time
  tests/qtest: Restore aarch64 arm-cpu-features test
  hw/arm/virt: Move kvm pmu setup to virt_cpu_post_init
  hw/arm/virt: Move post cpu realize check into its own function
  target/arm/kvm: Make uncalled stubs explicitly unreachable
  linux headers: sync to 5.9-rc7
  hw/char/bcm2835_aux: Allow less than 32-bit accesses
  hw/arm/sbsa-ref : allocate IRQs for SMMUv3
  hw/arm/sbsa-ref : Fix SMMUv3 Initialisation
  hw/arm/fsl-imx25: Fix a typo
  hw/ssi/npcm7xx_fiu: Fix handling of unsigned integer

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/e64cf4d569f6...497d415d76b9