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[Qemu-commits] [qemu/qemu] 05e6e4: aspeed: Fix a potential memory leak b

From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] 05e6e4: aspeed: Fix a potential memory leak bug in write_b...
Date: Wed, 09 Mar 2022 10:12:13 -0800 
  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 05e6e40a869cc7e4492c5ffc8161005bbb7be986
      
https://github.com/qemu/qemu/commit/05e6e40a869cc7e4492c5ffc8161005bbb7be986
  Author: Wentao_Liang <Wentao_Liang_g@163.com>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/arm/aspeed.c

  Log Message:
  -----------
  aspeed: Fix a potential memory leak bug in write_boot_rom()

A memory chunk is allocated with g_new0() and assigned to the variable
'storage'. However, if the branch takes true, there will be only an
error report but not a free operation for 'storage' before function
returns. As a result, a memory leak bug is triggered.

Use g_autofree to fix the issue.

Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Wentao_Liang <Wentao_Liang_g@163.com>
[ clg: reworked the commit log ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: dcacfa945103d179e71bb1c853f2a13aca5ca4b0
      
https://github.com/qemu/qemu/commit/dcacfa945103d179e71bb1c853f2a13aca5ca4b0
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/ssi/aspeed_smc.c

  Log Message:
  -----------
  aspeed/smc: Use max number of CE instead of 'num_cs'

The Aspeed SMC model uses the 'num_cs' field to allocate resources
fitting the number of devices of the machine. This is a small
optimization without real need in the controller. Simplify modelling
and use the max_peripherals field instead.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220307071856.1410731-2-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 9bd4ac61c7e7e5cc84d1d6fd1f70cc88b0ac95f7
      
https://github.com/qemu/qemu/commit/9bd4ac61c7e7e5cc84d1d6fd1f70cc88b0ac95f7
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/arm/aspeed.c

  Log Message:
  -----------
  aspeed: Rework aspeed_board_init_flashes() interface

Currently, the allocation of the flash devices uses the number of
slave selects configured in the SoC realize routine. It is simpler to
use directly the number of FMC devices defined in the machine class
and 1 for spi devices (which is what the SoC does in the back of the
machine).

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220307071856.1410731-3-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 8d99713bba88c2dff8d62a9d7370d026428335dc
      
https://github.com/qemu/qemu/commit/8d99713bba88c2dff8d62a9d7370d026428335dc
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/arm/aspeed.c
    M hw/arm/aspeed_ast2600.c
    M hw/arm/aspeed_soc.c
    M hw/ssi/aspeed_smc.c
    M include/hw/ssi/aspeed_smc.h

  Log Message:
  -----------
  aspeed/smc: Remove 'num_cs' field

It is not used anymore.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220307071856.1410731-4-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: ae945a00ff465f2e08be6ca6d83946fe5f9d6018
      
https://github.com/qemu/qemu/commit/ae945a00ff465f2e08be6ca6d83946fe5f9d6018
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/ssi/aspeed_smc.c
    M include/hw/ssi/aspeed_smc.h

  Log Message:
  -----------
  aspeed/smc: Rename 'max_peripherals' to 'cs_num_max'

The naming makes more sense in a SPI controller model.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220307071856.1410731-5-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 9bbdfe0569cc16199ed1a7deb77680b9d5051d1e
      
https://github.com/qemu/qemu/commit/9bbdfe0569cc16199ed1a7deb77680b9d5051d1e
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/ssi/aspeed_smc.c

  Log Message:
  -----------
  aspeed/smc: Let the SSI core layer define the bus name

If no id is provided, qdev automatically assigns an unique name with
the following pattern "<type>.<index>" which avoids bus name collision
when using multiple buses.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220307071856.1410731-6-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: c1402ea1226a4dd6f17f071dca8262e858af6008
      
https://github.com/qemu/qemu/commit/c1402ea1226a4dd6f17f071dca8262e858af6008
  Author: Cédric Le Goater <clg@kaod.org>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/ssi/aspeed_smc.c

  Log Message:
  -----------
  aspeed/smc: Fix error log

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220307071856.1410731-7-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 8fd49126dc9d3ae65f29efcc07b8e62e596fc5de
      
https://github.com/qemu/qemu/commit/8fd49126dc9d3ae65f29efcc07b8e62e596fc5de
  Author: Patrick Williams <patrick@stwcx.xyz>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/block/m25p80.c

  Log Message:
  -----------
  hw/block: m25p80: Add support for w25q01jvq

The w25q01jvq is a 128MB part.  Support is being added to the kernel[1]
and the two have been tested together.

1. https://lore.kernel.org/lkml/20220222092222.23108-1-potin.lai@quantatw.com/

Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
Cc: Potin Lai <potin.lai@quantatw.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Message-Id: <20220304180920.1780992-1-patrick@stwcx.xyz>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 179b2058829f934c17622b3bbfb398fcf267b670
      
https://github.com/qemu/qemu/commit/179b2058829f934c17622b3bbfb398fcf267b670
  Author: Patrick Williams <patrick@stwcx.xyz>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/arm/aspeed.c

  Log Message:
  -----------
  hw/arm/aspeed: allow missing spi_model

Generally all BMCs will use the fmc_model to hold their own flash
and most will have a spi_model to hold the managed system's flash,
but not all systems do.  Add a simple NULL check to allow a system
to set the spi_model as NULL to indicate it should not be instantiated.

Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
Message-Id: <20220305000656.1944589-1-patrick@stwcx.xyz>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: a20c54b1231dffa3fa0590905b67b2725138718e
      
https://github.com/qemu/qemu/commit/a20c54b1231dffa3fa0590905b67b2725138718e
  Author: Patrick Williams <patrick@stwcx.xyz>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/arm/aspeed.c

  Log Message:
  -----------
  hw/arm/aspeed: add Bletchley machine type

Add the 'bletchley-bmc' machine type based on the kernel DTS[1] and
hardware schematics available to me.  The i2c model is as complete as
the current QEMU models support, but in some cases I substituted devices
that are close enough for present functionality.  Strap registers are
kept the same as the AST2600-EVB until I'm able to confirm correct
values with physical hardware.

This has been tested with an openbmc image built from [2] plus a kernel
patch[3] for the SPI flash module.

1. 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts?id=a8c729e966c4e9d033242d948b0e53c2a62d32e2
2. 
https://github.com/openbmc/openbmc/commit/b9432b980d7f63f7512ffbcc7124386ba896dfc6
3. 
https://github.com/openbmc/linux/commit/25b566b9a9d7f5d4f10c1b7304007bdb286eefd7

Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
[ clg : increased number of FMC devices to 2 to match Linux dts ]
Message-Id: <20220305000656.1944589-2-patrick@stwcx.xyz>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 46179776c292f83848df90de60da5ae1a965ce6a
      
https://github.com/qemu/qemu/commit/46179776c292f83848df90de60da5ae1a965ce6a
  Author: Andrew Jeffery <andrew@aj.id.au>
  Date:   2022-03-08 (Tue, 08 Mar 2022)

  Changed paths:
    M hw/gpio/aspeed_gpio.c

  Log Message:
  -----------
  hw: aspeed_gpio: Cleanup stray semicolon after switch

Not sure how that got there.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Message-Id: <20220207150409.358888-2-andrew@aj.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>


  Commit: 8098417d117a8fc05bf8fa456003452d10a48108
      
https://github.com/qemu/qemu/commit/8098417d117a8fc05bf8fa456003452d10a48108
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2022-03-09 (Wed, 09 Mar 2022)

  Changed paths:
    M hw/arm/aspeed.c
    M hw/arm/aspeed_ast2600.c
    M hw/arm/aspeed_soc.c
    M hw/block/m25p80.c
    M hw/gpio/aspeed_gpio.c
    M hw/ssi/aspeed_smc.c
    M include/hw/ssi/aspeed_smc.h

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20220308' 
into staging

aspeed queue:

* Fix for a potential memory leak
* Aspeed SMC cleanups on the definition of the number of flash devices
* New bletchley-bmc machine, AST2600 based

# gpg: Signature made Tue 08 Mar 2022 08:19:25 GMT
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* remotes/legoater/tags/pull-aspeed-20220308:
  hw: aspeed_gpio: Cleanup stray semicolon after switch
  hw/arm/aspeed: add Bletchley machine type
  hw/arm/aspeed: allow missing spi_model
  hw/block: m25p80: Add support for w25q01jvq
  aspeed/smc: Fix error log
  aspeed/smc: Let the SSI core layer define the bus name
  aspeed/smc: Rename 'max_peripherals' to 'cs_num_max'
  aspeed/smc: Remove 'num_cs' field
  aspeed: Rework aspeed_board_init_flashes() interface
  aspeed/smc: Use max number of CE instead of 'num_cs'
  aspeed: Fix a potential memory leak bug in write_boot_rom()

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/4b7520911b8a...8098417d117a
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