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[Qemu-commits] [qemu/qemu] 3d81e8: hw/misc: Move some arm-related files
From: |
Peter Maydell |
Subject: |
[Qemu-commits] [qemu/qemu] 3d81e8: hw/misc: Move some arm-related files from specific... |
Date: |
Thu, 15 Dec 2022 09:41:24 -0800 |
Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: 3d81e8cf0c81b8b63d7d7056c450dd94bfbfd038
https://github.com/qemu/qemu/commit/3d81e8cf0c81b8b63d7d7056c450dd94bfbfd038
Author: Thomas Huth <thuth@redhat.com>
Date: 2022-12-15 (Thu, 15 Dec 2022)
Changed paths:
M hw/misc/imx6_src.c
M hw/misc/iotkit-sysctl.c
M hw/misc/meson.build
M include/hw/misc/xlnx-zynqmp-apu-ctrl.h
M target/arm/kvm-consts.h
Log Message:
-----------
hw/misc: Move some arm-related files from specific_ss into softmmu_ss
The header target/arm/kvm-consts.h checks CONFIG_KVM which is marked as
poisoned in common code, so the files that include this header have to
be added to specific_ss and recompiled for each, qemu-system-arm and
qemu-system-aarch64. However, since the kvm headers are only optionally
used in kvm-constants.h for some sanity checks, we can additionally
check the NEED_CPU_H macro first to avoid the poisoned CONFIG_KVM macro,
so kvm-constants.h can also be used from "common" files (without the
sanity checks - which should be OK since they are still done from other
target-specific files instead). This way, and by adjusting some other
include statements in the related files here and there, we can move some
files from specific_ss into softmmu_ss, so that they only need to be
compiled once during the build process.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20221202154023.293614-1-thuth@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 9e406eea309bbe44c7fb17f6af112d2b756854ad
https://github.com/qemu/qemu/commit/9e406eea309bbe44c7fb17f6af112d2b756854ad
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2022-12-15 (Thu, 15 Dec 2022)
Changed paths:
M target/arm/cpu.c
Log Message:
-----------
target/arm: Restrict arm_cpu_exec_interrupt() to TCG accelerator
When building with --disable-tcg on Darwin we get:
target/arm/cpu.c:725:16: error: incomplete definition of type 'struct
TCGCPUOps'
cc->tcg_ops->do_interrupt(cs);
~~~~~~~~~~~^
Commit 083afd18a9 ("target/arm: Restrict cpu_exec_interrupt()
handler to sysemu") limited this block to system emulation,
but neglected to also limit it to TCG.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-id: 20221209110823.59495-1-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 29dc49f0310ad4439424eeaf179de46d15bd2d6b
https://github.com/qemu/qemu/commit/29dc49f0310ad4439424eeaf179de46d15bd2d6b
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2022-12-15 (Thu, 15 Dec 2022)
Changed paths:
M docs/system/arm/emulation.rst
M docs/system/arm/virt.rst
M hw/arm/boot.c
M hw/arm/smmu-common.c
M hw/arm/smmuv3.c
M hw/arm/virt.c
M hw/intc/arm_gic_common.c
M hw/intc/arm_gic_kvm.c
M hw/intc/arm_gicv3_common.c
M hw/intc/arm_gicv3_dist.c
M hw/intc/arm_gicv3_its.c
M hw/intc/arm_gicv3_its_common.c
M hw/intc/arm_gicv3_its_kvm.c
M hw/intc/arm_gicv3_kvm.c
M hw/misc/imx6_src.c
M hw/misc/iotkit-sysctl.c
M hw/misc/meson.build
M include/hw/arm/smmuv3.h
M include/hw/arm/virt.h
M include/hw/misc/xlnx-zynqmp-apu-ctrl.h
M target/arm/cpu.c
M target/arm/cpu.h
M target/arm/cpu64.c
M target/arm/cpu_tcg.c
M target/arm/helper.c
M target/arm/kvm-consts.h
Log Message:
-----------
Merge tag 'pull-target-arm-20221215-1' of
https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* hw/arm/virt: Add properties to allow more granular
configuration of use of highmem space
* target/arm: Add Cortex-A55 CPU
* hw/intc/arm_gicv3: Fix GICD_TYPER ITLinesNumber advertisement
* Implement FEAT_EVT
* Some 3-phase-reset conversions for Arm GIC, SMMU
* hw/arm/boot: set initrd with #address-cells type in fdt
* hw/misc: Move some arm-related files from specific_ss into softmmu_ss
* Restrict arm_cpu_exec_interrupt() to TCG accelerator
# gpg: Signature made Thu 15 Dec 2022 17:38:36 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
[ultimate]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20221215-1' of
https://git.linaro.org/people/pmaydell/qemu-arm: (28 commits)
target/arm: Restrict arm_cpu_exec_interrupt() to TCG accelerator
hw/misc: Move some arm-related files from specific_ss into softmmu_ss
hw/arm/boot: set initrd with #address-cells type in fdt
hw/intc: Convert TYPE_KVM_ARM_ITS to 3-phase reset
hw/intc: Convert TYPE_ARM_GICV3_ITS to 3-phase reset
hw/intc: Convert TYPE_ARM_GICV3_ITS_COMMON to 3-phase reset
hw/intc: Convert TYPE_KVM_ARM_GICV3 to 3-phase reset
hw/intc: Convert TYPE_ARM_GICV3_COMMON to 3-phase reset
hw/intc: Convert TYPE_ARM_GIC_KVM to 3-phase reset
hw/intc: Convert TYPE_ARM_GIC_COMMON to 3-phase reset
hw/arm: Convert TYPE_ARM_SMMUV3 to 3-phase reset
hw/arm: Convert TYPE_ARM_SMMU to 3-phase reset
target/arm: Report FEAT_EVT for TCG '-cpu max'
target/arm: Implement HCR_EL2.TID4 traps
target/arm: Implement HCR_EL2.TICAB,TOCU traps
target/arm: Implement HCR_EL2.TTLBOS traps
target/arm: Implement HCR_EL2.TTLBIS traps
target/arm: Allow relevant HCR bits to be written for FEAT_EVT
hw/intc/arm_gicv3: Fix GICD_TYPER ITLinesNumber advertisement
target/arm: Add Cortex-A55 CPU
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/f18be5aea09d...29dc49f0310a
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