[Qemu-commits] [qemu/qemu] 8e5802: tcg: convert tcg/README to rst

qemu-commits
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-commits] [qemu/qemu] 8e5802: tcg: convert tcg/README to rst

From:	Peter Maydell
Subject:	[Qemu-commits] [qemu/qemu] 8e5802: tcg: convert tcg/README to rst
Date:	Wed, 04 Jan 2023 14:07:38 -0800
  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 8e58025467f5796ba9d55acd0b7196d389bb1ea1
      
https://github.com/qemu/qemu/commit/8e58025467f5796ba9d55acd0b7196d389bb1ea1
  Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
  Date:   2022-12-24 (Sat, 24 Dec 2022)

  Changed paths:
    M docs/devel/atomics.rst
    M docs/devel/index-tcg.rst
    A docs/devel/tcg-ops.rst
    M docs/devel/tcg.rst
    R tcg/README

  Log Message:
  -----------
  tcg: convert tcg/README to rst

Convert tcg/README to rst and move it to docs/devel as a new "TCG Intermediate
Representation" page. There are a few minor changes to improve the aesthetic
of the final output which are as follows:

  - Rename the title from "Tiny Code Generator - Fabrice Bellard" to "TCG
    Intermediate Representation"

  - Remove the section numbering

  - Add the missing parameters to the ssadd_vec operations in the "Host
    vector operations" section

  - Change the path to the Atomic Operations document to use a proper
    reference

  - Replace tcg/README in tcg.rst with a proper reference to the new document

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-Id: <20221130100434.64207-2-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: eef093c916081bbb39cdc9b089634e5d5775bf4d
      
https://github.com/qemu/qemu/commit/eef093c916081bbb39cdc9b089634e5d5775bf4d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-24 (Sat, 24 Dec 2022)

  Changed paths:
    M meson.build

  Log Message:
  -----------
  meson: Move CONFIG_TCG_INTERPRETER to config_host

Like CONFIG_TCG, the enabled method of execution is a host property
not a guest property.  This exposes the define to compile-once files.

Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: b15d099e2aca7fb6392fdb4cc8b209b796c90c52
      
https://github.com/qemu/qemu/commit/b15d099e2aca7fb6392fdb4cc8b209b796c90c52
  Author: Philippe Mathieu-Daudé <philmd@linaro.org>
  Date:   2022-12-24 (Sat, 24 Dec 2022)

  Changed paths:
    M tcg/s390x/tcg-target.c.inc

  Log Message:
  -----------
  tcg/s390x: Fix coding style

We are going to modify this code, so fix its style first to avoid:

  ERROR: spaces required around that '*' (ctx:VxV)
  #281: FILE: tcg/s390x/tcg-target.c.inc:1224:
  +        uintptr_t mask = ~(0xffffull << i*16);
                                            ^

Reviewed-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221130132654.76369-2-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 645f54d92a91073dd5288a6c80322ac6001b9efe
      
https://github.com/qemu/qemu/commit/645f54d92a91073dd5288a6c80322ac6001b9efe
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-24 (Sat, 24 Dec 2022)

  Changed paths:
    M tcg/ppc/tcg-target.c.inc
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Cleanup trailing whitespace

Remove whitespace at end of line, plus one place this also
highlights some missing braces.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 6dae808162447687461488763aef396826965042
      
https://github.com/qemu/qemu/commit/6dae808162447687461488763aef396826965042
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-24 (Sat, 24 Dec 2022)

  Changed paths:
    M include/qemu/main-loop.h

  Log Message:
  -----------
  qemu/main-loop: Introduce QEMU_IOTHREAD_LOCK_GUARD

Create a wrapper for locking/unlocking the iothread lock.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 0725309c4c766fe2d6e012fc1e018878a500b683
      
https://github.com/qemu/qemu/commit/0725309c4c766fe2d6e012fc1e018878a500b683
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-24 (Sat, 24 Dec 2022)

  Changed paths:
    M hw/mips/mips_int.c

  Log Message:
  -----------
  hw/mips: Use QEMU_IOTHREAD_LOCK_GUARD in cpu_mips_irq_request

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 06d65982a5c92689799f114532f303874e0b2eef
      
https://github.com/qemu/qemu/commit/06d65982a5c92689799f114532f303874e0b2eef
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-24 (Sat, 24 Dec 2022)

  Changed paths:
    M target/ppc/excp_helper.c

  Log Message:
  -----------
  target/ppc: Use QEMU_IOTHREAD_LOCK_GUARD in ppc_maybe_interrupt

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: e540e87c003d4722ccf2e426a4cf18bc6450cc3e
      
https://github.com/qemu/qemu/commit/e540e87c003d4722ccf2e426a4cf18bc6450cc3e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-24 (Sat, 24 Dec 2022)

  Changed paths:
    M target/ppc/helper_regs.c

  Log Message:
  -----------
  target/ppc: Use QEMU_IOTHREAD_LOCK_GUARD in cpu_interrupt_exittb

In addition, use tcg_enabled instead of !kvm_enabled.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 8721c3a5a1d28a46a935dd1d71ce11f3916e2c3a
      
https://github.com/qemu/qemu/commit/8721c3a5a1d28a46a935dd1d71ce11f3916e2c3a
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-24 (Sat, 24 Dec 2022)

  Changed paths:
    M target/riscv/cpu_helper.c

  Log Message:
  -----------
  target/riscv: Use QEMU_IOTHREAD_LOCK_GUARD in riscv_cpu_update_mip

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: e5f91d7ecdfb697c0dcaacb1aee229815dea1d7c
      
https://github.com/qemu/qemu/commit/e5f91d7ecdfb697c0dcaacb1aee229815dea1d7c
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-24 (Sat, 24 Dec 2022)

  Changed paths:
    M hw/ppc/ppc.c

  Log Message:
  -----------
  hw/ppc: Use QEMU_IOTHREAD_LOCK_GUARD in ppc_set_irq

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d421ed33fb626cb5848af820d6a3379631be7578
      
https://github.com/qemu/qemu/commit/d421ed33fb626cb5848af820d6a3379631be7578
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-24 (Sat, 24 Dec 2022)

  Changed paths:
    M accel/tcg/cputlb.c

  Log Message:
  -----------
  accel/tcg: Use QEMU_IOTHREAD_LOCK_GUARD in io_readx/io_writex

Narrow the scope of the lock to the actual read/write,
moving the cpu_transation_failed call outside the lock.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 4628ee56a4bb57ffd51022ec445483d9548517a6
      
https://github.com/qemu/qemu/commit/4628ee56a4bb57ffd51022ec445483d9548517a6
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-24 (Sat, 24 Dec 2022)

  Changed paths:
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Tidy tcg_reg_alloc_op

Replace goto allocate_in_reg with a boolean.
Remove o_preferred_regs which isn't used, except to copy.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 6caf7c5c067f18f003c46967c04d881f2ba7d1c2
      
https://github.com/qemu/qemu/commit/6caf7c5c067f18f003c46967c04d881f2ba7d1c2
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-24 (Sat, 24 Dec 2022)

  Changed paths:
    M tcg/aarch64/tcg-target.h
    M tcg/arm/tcg-target.h
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Remove TCG_TARGET_STACK_GROWSUP

The hppa host code has been removed since 2013; this
should have been deleted at the same time.

Fixes: 802b5081233a ("tcg-hppa: Remove tcg backend")
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 3c5f56f44902f744e3e3cc7a10728a0566534bc2
      
https://github.com/qemu/qemu/commit/3c5f56f44902f744e3e3cc7a10728a0566534bc2
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-24 (Sat, 24 Dec 2022)

  Changed paths:
    M tcg/tci.c
    M tcg/tci/tcg-target.c.inc

  Log Message:
  -----------
  tci: MAX_OPC_PARAM_IARGS is no longer used

Unused since commit 7b7d8b2d9a ("tcg/tci: Use ffi for calls").

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: a8210a12a60bdc2517a629e3c9dd2f8ef2c0ab22
      
https://github.com/qemu/qemu/commit/a8210a12a60bdc2517a629e3c9dd2f8ef2c0ab22
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-24 (Sat, 24 Dec 2022)

  Changed paths:
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Fix tcg_reg_alloc_dup*

The assignment to mem_coherent should be done with any
modification, not simply with a newly allocated register.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 209230ef36c54af1685ad2238dda79196f102e43
      
https://github.com/qemu/qemu/commit/209230ef36c54af1685ad2238dda79196f102e43
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-24 (Sat, 24 Dec 2022)

  Changed paths:
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Centralize updates to reg_to_temp

Create two new functions, set_temp_val_{reg,nonreg}.
Assert that the reg_to_temp mapping is correct before
any changes are made.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 154cf69145d7beab945be40c91d6ea930f0568c9
      
https://github.com/qemu/qemu/commit/154cf69145d7beab945be40c91d6ea930f0568c9
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-24 (Sat, 24 Dec 2022)

  Changed paths:
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Remove check_regs

We now check the consistency of reg_to_temp[] with each update,
so the utility of checking consistency at the end of each
opcode is minimal.  In addition, the form of this check is
quite expensive, consuming 10% of a checking-enabled build.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 74d960366ddbec2f57058c1f32ed8d72d56f8f6d
      
https://github.com/qemu/qemu/commit/74d960366ddbec2f57058c1f32ed8d72d56f8f6d
  Author: Philippe Mathieu-Daudé <philmd@linaro.org>
  Date:   2022-12-24 (Sat, 24 Dec 2022)

  Changed paths:
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Massage process_op_defs()

In preparation of introducing paired registers,
massage a bit process_op_defs()'s switch case.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
[PMD: Split from bigger patch, 1/3]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221219220925.79218-2-philmd@linaro.org>


  Commit: 61306cca97a133067e6ba728dcbe8204bea4f827
      
https://github.com/qemu/qemu/commit/61306cca97a133067e6ba728dcbe8204bea4f827
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-25 (Sun, 25 Dec 2022)

  Changed paths:
    M include/tcg/tcg.h
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Introduce paired register allocation

There are several instances where we need to be able to
allocate a pair of registers to related inputs/outputs.
Add 'p' and 'm' register constraints for this, in order to
be able to allocate the even/odd register first or second.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: a030ec3286507c71b667d47c5694a4e5107d2307
      
https://github.com/qemu/qemu/commit/a030ec3286507c71b667d47c5694a4e5107d2307
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-25 (Sun, 25 Dec 2022)

  Changed paths:
    M hw/core/cpu-common.c

  Log Message:
  -----------
  accel/tcg: Set cflags_next_tb in cpu_common_initfn

While we initialize this value in cpu_common_reset, that
isn't called during startup, so set it as well in init.
This fixes -singlestep versus the very first TB.

Fixes: 04f5b647ed07 ("accel/tcg: Handle -singlestep in curr_cflags")
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 96cf537064981a3ead369519c17c4880cda58e94
      
https://github.com/qemu/qemu/commit/96cf537064981a3ead369519c17c4880cda58e94
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-25 (Sun, 25 Dec 2022)

  Changed paths:
    M target/sparc/translate.c

  Log Message:
  -----------
  target/sparc: Avoid TCGV_{LOW,HIGH}

Use the official extend/extract functions instead of routines
that will shortly be internal to tcg.

Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 4e14e4c309f853aaec5862d357428a35b216a0ea
      
https://github.com/qemu/qemu/commit/4e14e4c309f853aaec5862d357428a35b216a0ea
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-25 (Sun, 25 Dec 2022)

  Changed paths:
    M include/tcg/tcg-op.h
    M include/tcg/tcg.h
    M tcg/tcg-internal.h
    M tcg/tcg-op-vec.c
    M tcg/tcg-op.c

  Log Message:
  -----------
  tcg: Move TCG_{LOW,HIGH} to tcg-internal.h

Move the error-generating fallback from tcg-op.c, and
replace "_link_error" with modern QEMU_ERROR markup.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: c5901a217f0d8dd6c71da349580ebe9fad63bd2b
      
https://github.com/qemu/qemu/commit/c5901a217f0d8dd6c71da349580ebe9fad63bd2b
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-25 (Sun, 25 Dec 2022)

  Changed paths:
    M include/tcg/tcg.h
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Add temp_subindex to TCGTemp

Record the location of a TCGTemp within a larger object.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d85f64e2ef4a6a76a8c725280d8aff145f4b91e4
      
https://github.com/qemu/qemu/commit/d85f64e2ef4a6a76a8c725280d8aff145f4b91e4
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-25 (Sun, 25 Dec 2022)

  Changed paths:
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Simplify calls to temp_sync vs mem_coherent

The first thing that temp_sync does is check mem_coherent,
so there's no need for the caller to do so.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: e66c38d3499ddb0be7128799d89c294097501a60
      
https://github.com/qemu/qemu/commit/e66c38d3499ddb0be7128799d89c294097501a60
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-25 (Sun, 25 Dec 2022)

  Changed paths:
    M tcg/tcg-internal.h
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Allocate TCGTemp pairs in host memory order

Allocate the first of a pair at the lower address, and the
second of a pair at the higher address.  This will make it
easier to find the beginning of the larger memory block.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: d4ca81ec473e2169018a6d779aa89163cf2a0144
      
https://github.com/qemu/qemu/commit/d4ca81ec473e2169018a6d779aa89163cf2a0144
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-25 (Sun, 25 Dec 2022)

  Changed paths:
    M include/tcg/tcg.h

  Log Message:
  -----------
  tcg: Move TCG_TYPE_COUNT outside enum

The count is not itself an enumerator.  Move it outside to
prevent the compiler from considering it with -Wswitch-enum.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 069ab796a35754105f89f5f7ac4bf16c397573cf
      
https://github.com/qemu/qemu/commit/069ab796a35754105f89f5f7ac4bf16c397573cf
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-25 (Sun, 25 Dec 2022)

  Changed paths:
    M include/tcg/tcg.h
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Introduce tcg_type_size

Add a helper function for computing the size of a type.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: ddc0d2e34d39eaa85fc5acfebf74f5632a88b39a
      
https://github.com/qemu/qemu/commit/ddc0d2e34d39eaa85fc5acfebf74f5632a88b39a
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-25 (Sun, 25 Dec 2022)

  Changed paths:
    M tcg/tcg-internal.h

  Log Message:
  -----------
  tcg: Introduce TCGCallReturnKind and TCGCallArgumentKind

Prepare to replace a bunch of separate ifdefs with a
consistent way to describe the ABI of a function call.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 5619eddbeb86886db12077276f6607aebae06db6
      
https://github.com/qemu/qemu/commit/5619eddbeb86886db12077276f6607aebae06db6
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-25 (Sun, 25 Dec 2022)

  Changed paths:
    M tcg/aarch64/tcg-target.h
    M tcg/arm/tcg-target.h
    M tcg/i386/tcg-target.h
    M tcg/loongarch64/tcg-target.h
    M tcg/mips/tcg-target.h
    M tcg/ppc/tcg-target.c.inc
    M tcg/riscv/tcg-target.h
    M tcg/s390x/tcg-target.h
    M tcg/sparc64/tcg-target.h
    M tcg/tcg.c
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg: Replace TCG_TARGET_CALL_ALIGN_ARGS with TCG_TARGET_CALL_ARG_I64

For 32-bit hosts when TCG_TARGET_CALL_ALIGN_ARGS was set, use
TCG_CALL_ARG_EVEN.  For 64-bit hosts, TCG_TARGET_CALL_ALIGN_ARGS
was silently ignored, so always use TCG_CALL_ARG_NORMAL.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: f46396e04af297bde5568b8457523cc393967804
      
https://github.com/qemu/qemu/commit/f46396e04af297bde5568b8457523cc393967804
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-25 (Sun, 25 Dec 2022)

  Changed paths:
    M tcg/aarch64/tcg-target.h
    M tcg/arm/tcg-target.h
    M tcg/i386/tcg-target.h
    M tcg/loongarch64/tcg-target.h
    M tcg/mips/tcg-target.h
    M tcg/ppc/tcg-target.c.inc
    M tcg/riscv/tcg-target.h
    M tcg/s390x/tcg-target.h
    M tcg/sparc64/tcg-target.h
    M tcg/tcg.c
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg: Replace TCG_TARGET_EXTEND_ARGS with TCG_TARGET_CALL_ARG_I32

For 64-bit hosts that had TCG_TARGET_EXTEND_ARGS, set
TCG_TARGET_CALL_ARG_I32 to TCG_CALL_ARG_EXTEND.
Otherwise, use TCG_CALL_ARG_NORMAL.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: b94d301aa74b1e2afff399d9b5ed95019d2ef8c0
      
https://github.com/qemu/qemu/commit/b94d301aa74b1e2afff399d9b5ed95019d2ef8c0
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-25 (Sun, 25 Dec 2022)

  Changed paths:
    M tcg/tcg.c
    M tcg/tci/tcg-target.h

  Log Message:
  -----------
  tcg: Use TCG_CALL_ARG_EVEN for TCI special case

Change 32-bit tci TCG_TARGET_CALL_ARG_I32 to TCG_CALL_ARG_EVEN, to
force 32-bit values to be aligned to 64-bit.  With a small reorg
to the argument processing loop, this neatly replaces an ifdef for
CONFIG_TCG_INTERPRETER.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 793a3e3be8f5113f162925a40a311fc5ebd826fc
      
https://github.com/qemu/qemu/commit/793a3e3be8f5113f162925a40a311fc5ebd826fc
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-25 (Sun, 25 Dec 2022)

  Changed paths:
    M accel/tcg/plugin-gen.c

  Log Message:
  -----------
  accel/tcg/plugin: Don't search for the function pointer index

The function pointer is immediately after the output and input
operands; no need to search.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 38e3d66ec5a983a720117a141f18536249272070
      
https://github.com/qemu/qemu/commit/38e3d66ec5a983a720117a141f18536249272070
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-25 (Sun, 25 Dec 2022)

  Changed paths:
    M accel/tcg/plugin-gen.c

  Log Message:
  -----------
  accel/tcg/plugin: Avoid duplicate copy in copy_call

We copied all of the arguments in copy_op_nocheck.
We only need to replace the one argument that we change.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 09967a24b3b98ad9cfe2352b869bd8e1969c7a1e
      
https://github.com/qemu/qemu/commit/09967a24b3b98ad9cfe2352b869bd8e1969c7a1e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-25 (Sun, 25 Dec 2022)

  Changed paths:
    M accel/tcg/plugin-gen.c

  Log Message:
  -----------
  accel/tcg/plugin: Use copy_op in append_{udata,mem}_cb

Better to re-use the existing function for copying ops.

Acked-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: b9d5956cb38af76c6db3c75a2b1d8a66727e56ea
      
https://github.com/qemu/qemu/commit/b9d5956cb38af76c6db3c75a2b1d8a66727e56ea
  Author: Philippe Mathieu-Daudé <philmd@linaro.org>
  Date:   2022-12-29 (Thu, 29 Dec 2022)

  Changed paths:
    M accel/tcg/plugin-gen.c
    M include/tcg/tcg-op.h
    M include/tcg/tcg.h
    M tcg/optimize.c
    M tcg/tcg-op-vec.c
    M tcg/tcg-op.c
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Pass number of arguments to tcg_emit_op() / tcg_op_insert_*()

In order to have variable size allocated TCGOp, pass the number
of arguments we use (and would allocate) up to tcg_op_alloc().

This alters tcg_emit_op(), tcg_op_insert_before() and
tcg_op_insert_after() prototypes.

In tcg_op_alloc() ensure the number of arguments is in range.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
[PMD: Extracted from bigger patch]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221218211832.73312-2-philmd@linaro.org>


  Commit: 0b5aeff2987675c89ee67ba0ced7fe94fca3161f
      
https://github.com/qemu/qemu/commit/0b5aeff2987675c89ee67ba0ced7fe94fca3161f
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-29 (Thu, 29 Dec 2022)

  Changed paths:
    M accel/tcg/plugin-gen.c
    M include/exec/helper-head.h
    M include/tcg/tcg.h
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Vary the allocation size for TCGOp

We have been allocating a worst case number of arguments
to support calls.  Instead, allow the size to vary.
By default leave space for 4 args, to maximize reuse,
but allow calls to increase the number of args to 32.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
[PMD: Split patch in two]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221218211832.73312-3-philmd@linaro.org>


  Commit: 8adbcbd3347d3b31f62a74f59428bb0d731966b9
      
https://github.com/qemu/qemu/commit/8adbcbd3347d3b31f62a74f59428bb0d731966b9
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-29 (Thu, 29 Dec 2022)

  Changed paths:
    M include/tcg/tcg.h
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Use output_pref wrapper function

We will shortly have the possibility of more that two outputs,
though only for calls (for which preferences are moot).  Avoid
direct references to op->output_pref[] when possible.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: a6926be946f7a250fd2733b5a89bbf130af4f7af
      
https://github.com/qemu/qemu/commit/a6926be946f7a250fd2733b5a89bbf130af4f7af
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-29 (Thu, 29 Dec 2022)

  Changed paths:
    M include/exec/helper-head.h
    M include/tcg/tcg.h
    M tcg/optimize.c
    M tcg/tcg-internal.h
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Reorg function calls

Pre-compute the function call layout for each helper at startup.
Drop TCG_CALL_DUMMY_ARG, as we no longer need to leave gaps
in the op->args[] array.  This allows several places to stop
checking for NULL TCGTemp, to which TCG_CALL_DUMMY_ARG mapped.

For tcg_gen_callN, loop over the arguments once.  Allocate the TCGOp
for the call early but delay emitting it, collecting arguments first.
This allows the argument processing loop to emit code for extensions
and have them sequenced before the call.

For tcg_reg_alloc_call, loop over the arguments in reverse order,
which allows stack slots to be filled first naturally.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 95a37879c789679081286374554c5c746b91e40a
      
https://github.com/qemu/qemu/commit/95a37879c789679081286374554c5c746b91e40a
  Author: Philippe Mathieu-Daudé <philmd@linaro.org>
  Date:   2022-12-29 (Thu, 29 Dec 2022)

  Changed paths:
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Convert typecode_to_ffi from array to function

In the unlikely case of invalid typecode mask, the function
will abort instead of returning a NULL pointer.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221111074101.2069454-27-richard.henderson@linaro.org>
[PMD: Split from bigger patch]
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221122180804.938-2-philmd@linaro.org>


  Commit: fe94a23741d0d7ae606fec910cc8edb712061312
      
https://github.com/qemu/qemu/commit/fe94a23741d0d7ae606fec910cc8edb712061312
  Author: Philippe Mathieu-Daudé <philmd@linaro.org>
  Date:   2022-12-29 (Thu, 29 Dec 2022)

  Changed paths:
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Factor init_ffi_layouts() out of tcg_context_init()

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221111074101.2069454-27-richard.henderson@linaro.org>
[PMD: Split from bigger patch]
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221122180804.938-3-philmd@linaro.org>


  Commit: 7df938eb9c6f919c7f0461a631ed2f49fde5a610
      
https://github.com/qemu/qemu/commit/7df938eb9c6f919c7f0461a631ed2f49fde5a610
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-29 (Thu, 29 Dec 2022)

  Changed paths:
    M tcg/tcg-internal.h
    M tcg/tcg.c

  Log Message:
  -----------
  tcg: Move ffi_cif pointer into TCGHelperInfo

Instead of requiring a separate hash table lookup,
put a pointer to the CIF into TCGHelperInfo.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221111074101.2069454-27-richard.henderson@linaro.org>
[PMD: Split from bigger patch]
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221122180804.938-4-philmd@linaro.org>


  Commit: 97d93350fb631667adcf402293f641a558735ccd
      
https://github.com/qemu/qemu/commit/97d93350fb631667adcf402293f641a558735ccd
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-29 (Thu, 29 Dec 2022)

  Changed paths:
    M tcg/aarch64/tcg-target.c.inc

  Log Message:
  -----------
  tcg/aarch64: Merge tcg_out_callr into tcg_out_call

There is only one use, and BLR is perhaps even more
self-documentary than CALLR.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: fefa6c1ce33b77fb8373485eead6311b4e95efb2
      
https://github.com/qemu/qemu/commit/fefa6c1ce33b77fb8373485eead6311b4e95efb2
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-29 (Thu, 29 Dec 2022)

  Changed paths:
    M tcg/aarch64/tcg-target.c.inc
    M tcg/arm/tcg-target.c.inc
    M tcg/i386/tcg-target.c.inc
    M tcg/loongarch64/tcg-target.c.inc
    M tcg/mips/tcg-target.c.inc
    M tcg/ppc/tcg-target.c.inc
    M tcg/riscv/tcg-target.c.inc
    M tcg/s390x/tcg-target.c.inc
    M tcg/sparc64/tcg-target.c.inc
    M tcg/tcg.c
    M tcg/tci/tcg-target.c.inc

  Log Message:
  -----------
  tcg: Add TCGHelperInfo argument to tcg_out_call

This eliminates an ifdef for TCI, and will be required for
expanding the call for TCGv_i128.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: b9a10580f61e095ca0d14f5ab575481afad33d08
      
https://github.com/qemu/qemu/commit/b9a10580f61e095ca0d14f5ab575481afad33d08
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-29 (Thu, 29 Dec 2022)

  Changed paths:
    M accel/tcg/tb-maint.c

  Log Message:
  -----------
  accel/tcg: Fix tb_invalidate_phys_page_unwind

When called from syscall(), we are not within a TB and pc == 0.
We can skip the check for invalidating the current TB.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 7ada6912b04bfd6af0296b6bf463c9a1b776ef40
      
https://github.com/qemu/qemu/commit/7ada6912b04bfd6af0296b6bf463c9a1b776ef40
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-29 (Thu, 29 Dec 2022)

  Changed paths:
    M accel/tcg/user-exec.c

  Log Message:
  -----------
  accel/tcg: Use g_free_rcu for user-exec interval trees

Because we allow lockless lookups, we have to be careful
when it is freed.  Use rcu to delay the free until safe.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: a6d987a6668bc5df8840a7ea0ea76de01100750c
      
https://github.com/qemu/qemu/commit/a6d987a6668bc5df8840a7ea0ea76de01100750c
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-12-29 (Thu, 29 Dec 2022)

  Changed paths:
    M accel/tcg/user-exec.c

  Log Message:
  -----------
  accel/tcg: Handle false negative lookup in page_check_range

As in page_get_flags, we need to try again with the mmap
lock held if we fail a page lookup.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: b05e35533782a71a9fda472afd08442f50622a3e
      
https://github.com/qemu/qemu/commit/b05e35533782a71a9fda472afd08442f50622a3e
  Author: Ilya Leoshkevich <iii@linux.ibm.com>
  Date:   2022-12-29 (Thu, 29 Dec 2022)

  Changed paths:
    M tests/tcg/multiarch/Makefile.target
    M tests/tcg/multiarch/munmap-pthread.c
    A tests/tcg/multiarch/nop_func.h
    A tests/tcg/multiarch/vma-pthread.c

  Log Message:
  -----------
  tests/tcg/multiarch: add vma-pthread.c

Add a test that locklessly changes and exercises page protection bits
from various threads. This helps catch race conditions in the VMA
handling.

Acked-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20221223120252.513319-1-iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 3bd6c1f332e282b259c184d209f7f79a56b4d2e0
      
https://github.com/qemu/qemu/commit/3bd6c1f332e282b259c184d209f7f79a56b4d2e0
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2023-01-04 (Wed, 04 Jan 2023)

  Changed paths:
    M accel/tcg/cputlb.c
    M accel/tcg/plugin-gen.c
    M accel/tcg/tb-maint.c
    M accel/tcg/user-exec.c
    M docs/devel/atomics.rst
    M docs/devel/index-tcg.rst
    A docs/devel/tcg-ops.rst
    M docs/devel/tcg.rst
    M hw/core/cpu-common.c
    M hw/mips/mips_int.c
    M hw/ppc/ppc.c
    M include/exec/helper-head.h
    M include/qemu/main-loop.h
    M include/tcg/tcg-op.h
    M include/tcg/tcg.h
    M meson.build
    M target/ppc/excp_helper.c
    M target/ppc/helper_regs.c
    M target/riscv/cpu_helper.c
    M target/sparc/translate.c
    R tcg/README
    M tcg/aarch64/tcg-target.c.inc
    M tcg/aarch64/tcg-target.h
    M tcg/arm/tcg-target.c.inc
    M tcg/arm/tcg-target.h
    M tcg/i386/tcg-target.c.inc
    M tcg/i386/tcg-target.h
    M tcg/loongarch64/tcg-target.c.inc
    M tcg/loongarch64/tcg-target.h
    M tcg/mips/tcg-target.c.inc
    M tcg/mips/tcg-target.h
    M tcg/optimize.c
    M tcg/ppc/tcg-target.c.inc
    M tcg/riscv/tcg-target.c.inc
    M tcg/riscv/tcg-target.h
    M tcg/s390x/tcg-target.c.inc
    M tcg/s390x/tcg-target.h
    M tcg/sparc64/tcg-target.c.inc
    M tcg/sparc64/tcg-target.h
    M tcg/tcg-internal.h
    M tcg/tcg-op-vec.c
    M tcg/tcg-op.c
    M tcg/tcg.c
    M tcg/tci.c
    M tcg/tci/tcg-target.c.inc
    M tcg/tci/tcg-target.h
    M tests/tcg/multiarch/Makefile.target
    M tests/tcg/multiarch/munmap-pthread.c
    A tests/tcg/multiarch/nop_func.h
    A tests/tcg/multiarch/vma-pthread.c

  Log Message:
  -----------
  Merge tag 'pull-tcg-20221229' of https://gitlab.com/rth7680/qemu into staging

Fix race conditions in new user-only vma tracking.
Add tcg backend paired register allocation.
Cleanup tcg backend function call abi.

# gpg: Signature made Thu 29 Dec 2022 23:55:08 GMT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" 
[full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20221229' of https://gitlab.com/rth7680/qemu: (47 commits)
  tests/tcg/multiarch: add vma-pthread.c
  accel/tcg: Handle false negative lookup in page_check_range
  accel/tcg: Use g_free_rcu for user-exec interval trees
  accel/tcg: Fix tb_invalidate_phys_page_unwind
  tcg: Add TCGHelperInfo argument to tcg_out_call
  tcg/aarch64: Merge tcg_out_callr into tcg_out_call
  tcg: Move ffi_cif pointer into TCGHelperInfo
  tcg: Factor init_ffi_layouts() out of tcg_context_init()
  tcg: Convert typecode_to_ffi from array to function
  tcg: Reorg function calls
  tcg: Use output_pref wrapper function
  tcg: Vary the allocation size for TCGOp
  tcg: Pass number of arguments to tcg_emit_op() / tcg_op_insert_*()
  accel/tcg/plugin: Use copy_op in append_{udata,mem}_cb
  accel/tcg/plugin: Avoid duplicate copy in copy_call
  accel/tcg/plugin: Don't search for the function pointer index
  tcg: Use TCG_CALL_ARG_EVEN for TCI special case
  tcg: Replace TCG_TARGET_EXTEND_ARGS with TCG_TARGET_CALL_ARG_I32
  tcg: Replace TCG_TARGET_CALL_ALIGN_ARGS with TCG_TARGET_CALL_ARG_I64
  tcg: Introduce TCGCallReturnKind and TCGCallArgumentKind
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/cb9c6a8e5ad6...3bd6c1f332e2
[Prev in Thread]
Current Thread
[Next in Thread]
[Qemu-commits] [qemu/qemu] 8e5802: tcg: convert tcg/README to rst, Peter Maydell <=
Prev by Date: [Qemu-commits] [qemu/qemu] cb9c6a: .gitlab-ci.d/windows: Work-around timeout and Open...
Next by Date: [Qemu-commits] [qemu/qemu] b11cf3: virtio-mem: Fix the bitmap index of the section of...
Previous by thread: [Qemu-commits] [qemu/qemu] cb9c6a: .gitlab-ci.d/windows: Work-around timeout and Open...
Next by thread: [Qemu-commits] [qemu/qemu] b11cf3: virtio-mem: Fix the bitmap index of the section of...
Index(es):
- Date
- Thread