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[Qemu-commits] [qemu/qemu] 5e97a2: tcg: convert tcg/README to rst
From: |
Peter Maydell |
Subject: |
[Qemu-commits] [qemu/qemu] 5e97a2: tcg: convert tcg/README to rst |
Date: |
Fri, 06 Jan 2023 14:15:43 -0800 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 5e97a28a8b91efca0c731ee19805a1e25cfd26ea
https://github.com/qemu/qemu/commit/5e97a28a8b91efca0c731ee19805a1e25cfd26ea
Author: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Date: 2023-01-04 (Wed, 04 Jan 2023)
Changed paths:
M docs/devel/atomics.rst
M docs/devel/index-tcg.rst
A docs/devel/tcg-ops.rst
M docs/devel/tcg.rst
R tcg/README
Log Message:
-----------
tcg: convert tcg/README to rst
Convert tcg/README to rst and move it to docs/devel as a new "TCG Intermediate
Representation" page. There are a few minor changes to improve the aesthetic
of the final output which are as follows:
- Rename the title from "Tiny Code Generator - Fabrice Bellard" to "TCG
Intermediate Representation"
- Remove the section numbering
- Add the missing parameters to the ssadd_vec operations in the "Host
vector operations" section
- Change the path to the Atomic Operations document to use a proper
reference
- Replace tcg/README in tcg.rst with a proper reference to the new document
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-Id: <20221130100434.64207-2-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ed145144c465f8e1ba7d5b692450c135c45af3db
https://github.com/qemu/qemu/commit/ed145144c465f8e1ba7d5b692450c135c45af3db
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-04 (Wed, 04 Jan 2023)
Changed paths:
M meson.build
Log Message:
-----------
meson: Move CONFIG_TCG_INTERPRETER to config_host
Like CONFIG_TCG, the enabled method of execution is a host property
not a guest property. This exposes the define to compile-once files.
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: dba6a9ebc1466cc6d495f2206ba8339e96e2abd5
https://github.com/qemu/qemu/commit/dba6a9ebc1466cc6d495f2206ba8339e96e2abd5
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-01-04 (Wed, 04 Jan 2023)
Changed paths:
M tcg/s390x/tcg-target.c.inc
Log Message:
-----------
tcg/s390x: Fix coding style
We are going to modify this code, so fix its style first to avoid:
ERROR: spaces required around that '*' (ctx:VxV)
#281: FILE: tcg/s390x/tcg-target.c.inc:1224:
+ uintptr_t mask = ~(0xffffull << i*16);
^
Reviewed-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221130132654.76369-2-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: a813e36f2bdf254a6a41e702fe85453105ad91da
https://github.com/qemu/qemu/commit/a813e36f2bdf254a6a41e702fe85453105ad91da
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-04 (Wed, 04 Jan 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
M tcg/tcg.c
Log Message:
-----------
tcg: Cleanup trailing whitespace
Remove whitespace at end of line, plus one place this also
highlights some missing braces.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 0aa5d47ac58d914cd1e0dbd69d5a21c89d1b8079
https://github.com/qemu/qemu/commit/0aa5d47ac58d914cd1e0dbd69d5a21c89d1b8079
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-04 (Wed, 04 Jan 2023)
Changed paths:
M include/qemu/main-loop.h
Log Message:
-----------
qemu/main-loop: Introduce QEMU_IOTHREAD_LOCK_GUARD
Create a wrapper for locking/unlocking the iothread lock.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 6fa8c46e55f1ef141b188563e914c46957ce163c
https://github.com/qemu/qemu/commit/6fa8c46e55f1ef141b188563e914c46957ce163c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-04 (Wed, 04 Jan 2023)
Changed paths:
M hw/mips/mips_int.c
Log Message:
-----------
hw/mips: Use QEMU_IOTHREAD_LOCK_GUARD in cpu_mips_irq_request
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 2fc4f9f3ff2362d4436476087fb13ad26fd2814a
https://github.com/qemu/qemu/commit/2fc4f9f3ff2362d4436476087fb13ad26fd2814a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-04 (Wed, 04 Jan 2023)
Changed paths:
M target/ppc/excp_helper.c
Log Message:
-----------
target/ppc: Use QEMU_IOTHREAD_LOCK_GUARD in ppc_maybe_interrupt
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 03ac0a0cfdfd8dd0708c2fb1fdec09319c1add3c
https://github.com/qemu/qemu/commit/03ac0a0cfdfd8dd0708c2fb1fdec09319c1add3c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-04 (Wed, 04 Jan 2023)
Changed paths:
M target/ppc/helper_regs.c
Log Message:
-----------
target/ppc: Use QEMU_IOTHREAD_LOCK_GUARD in cpu_interrupt_exittb
In addition, use tcg_enabled instead of !kvm_enabled.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: b3eb5b861a9ad5d885c15760cc3570fa3678b836
https://github.com/qemu/qemu/commit/b3eb5b861a9ad5d885c15760cc3570fa3678b836
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-04 (Wed, 04 Jan 2023)
Changed paths:
M target/riscv/cpu_helper.c
Log Message:
-----------
target/riscv: Use QEMU_IOTHREAD_LOCK_GUARD in riscv_cpu_update_mip
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 50c9c512ac15e8eeb0ec63f6a92ba8e017e7676e
https://github.com/qemu/qemu/commit/50c9c512ac15e8eeb0ec63f6a92ba8e017e7676e
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-04 (Wed, 04 Jan 2023)
Changed paths:
M hw/ppc/ppc.c
Log Message:
-----------
hw/ppc: Use QEMU_IOTHREAD_LOCK_GUARD in ppc_set_irq
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 61b59fb2691f749e1b647a512121d6813b23ff44
https://github.com/qemu/qemu/commit/61b59fb2691f749e1b647a512121d6813b23ff44
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-04 (Wed, 04 Jan 2023)
Changed paths:
M accel/tcg/cputlb.c
Log Message:
-----------
accel/tcg: Use QEMU_IOTHREAD_LOCK_GUARD in io_readx/io_writex
Narrow the scope of the lock to the actual read/write,
moving the cpu_transation_failed call outside the lock.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 1c1824dca404155b1116023d794ec227ae71a424
https://github.com/qemu/qemu/commit/1c1824dca404155b1116023d794ec227ae71a424
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-04 (Wed, 04 Jan 2023)
Changed paths:
M tcg/tcg.c
Log Message:
-----------
tcg: Tidy tcg_reg_alloc_op
Replace goto allocate_in_reg with a boolean.
Remove o_preferred_regs which isn't used, except to copy.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 8d21de51b93e439cd026cb9edcea192550345a6c
https://github.com/qemu/qemu/commit/8d21de51b93e439cd026cb9edcea192550345a6c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-04 (Wed, 04 Jan 2023)
Changed paths:
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.h
M tcg/tcg.c
Log Message:
-----------
tcg: Remove TCG_TARGET_STACK_GROWSUP
The hppa host code has been removed since 2013; this
should have been deleted at the same time.
Fixes: 802b5081233a ("tcg-hppa: Remove tcg backend")
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 7789b16d110af4fbf73310fac8fa4012925928ab
https://github.com/qemu/qemu/commit/7789b16d110af4fbf73310fac8fa4012925928ab
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-04 (Wed, 04 Jan 2023)
Changed paths:
M tcg/tci.c
M tcg/tci/tcg-target.c.inc
Log Message:
-----------
tci: MAX_OPC_PARAM_IARGS is no longer used
Unused since commit 7b7d8b2d9a ("tcg/tci: Use ffi for calls").
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 36f5539cfd3f09444657e4c1f6b6b461cea2235f
https://github.com/qemu/qemu/commit/36f5539cfd3f09444657e4c1f6b6b461cea2235f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-04 (Wed, 04 Jan 2023)
Changed paths:
M tcg/tcg.c
Log Message:
-----------
tcg: Fix tcg_reg_alloc_dup*
The assignment to mem_coherent should be done with any
modification, not simply with a newly allocated register.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 098859f108af3e7f96efe6eeb1418f693e5e64ce
https://github.com/qemu/qemu/commit/098859f108af3e7f96efe6eeb1418f693e5e64ce
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-04 (Wed, 04 Jan 2023)
Changed paths:
M tcg/tcg.c
Log Message:
-----------
tcg: Centralize updates to reg_to_temp
Create two new functions, set_temp_val_{reg,nonreg}.
Assert that the reg_to_temp mapping is correct before
any changes are made.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 568e010b897783bd1f44c9ea989582098e737fc9
https://github.com/qemu/qemu/commit/568e010b897783bd1f44c9ea989582098e737fc9
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-04 (Wed, 04 Jan 2023)
Changed paths:
M tcg/tcg.c
Log Message:
-----------
tcg: Remove check_regs
We now check the consistency of reg_to_temp[] with each update,
so the utility of checking consistency at the end of each
opcode is minimal. In addition, the form of this check is
quite expensive, consuming 10% of a checking-enabled build.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 8940ea0d326252cdbfd0fb5d6092caa3647a3b94
https://github.com/qemu/qemu/commit/8940ea0d326252cdbfd0fb5d6092caa3647a3b94
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-01-04 (Wed, 04 Jan 2023)
Changed paths:
M tcg/tcg.c
Log Message:
-----------
tcg: Massage process_op_defs()
In preparation of introducing paired registers,
massage a bit process_op_defs()'s switch case.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
[PMD: Split from bigger patch, 1/3]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221219220925.79218-2-philmd@linaro.org>
Commit: 29f5e92502effeadde242500a63dfd87a275ab46
https://github.com/qemu/qemu/commit/29f5e92502effeadde242500a63dfd87a275ab46
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M include/tcg/tcg.h
M tcg/tcg.c
Log Message:
-----------
tcg: Introduce paired register allocation
There are several instances where we need to be able to
allocate a pair of registers to related inputs/outputs.
Add 'p' and 'm' register constraints for this, in order to
be able to allocate the even/odd register first or second.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: c8cc6879f61cd589a9ed211729f12bc3b46beed4
https://github.com/qemu/qemu/commit/c8cc6879f61cd589a9ed211729f12bc3b46beed4
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M hw/core/cpu-common.c
Log Message:
-----------
accel/tcg: Set cflags_next_tb in cpu_common_initfn
While we initialize this value in cpu_common_reset, that
isn't called during startup, so set it as well in init.
This fixes -singlestep versus the very first TB.
Fixes: 04f5b647ed07 ("accel/tcg: Handle -singlestep in curr_cflags")
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 8e7bbc7575f85a350a3e6650a551983036a2698d
https://github.com/qemu/qemu/commit/8e7bbc7575f85a350a3e6650a551983036a2698d
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Avoid TCGV_{LOW,HIGH}
Use the official extend/extract functions instead of routines
that will shortly be internal to tcg.
Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d56fea79f9d24c62b0a8c3a80924147942409258
https://github.com/qemu/qemu/commit/d56fea79f9d24c62b0a8c3a80924147942409258
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M include/tcg/tcg-op.h
M include/tcg/tcg.h
M tcg/tcg-internal.h
M tcg/tcg-op-vec.c
M tcg/tcg-op.c
Log Message:
-----------
tcg: Move TCG_{LOW,HIGH} to tcg-internal.h
Move the error-generating fallback from tcg-op.c, and
replace "_link_error" with modern QEMU_ERROR markup.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: fac87bd2a49bf16edeb1d2823a993ad7c9ed073b
https://github.com/qemu/qemu/commit/fac87bd2a49bf16edeb1d2823a993ad7c9ed073b
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M include/tcg/tcg.h
M tcg/tcg.c
Log Message:
-----------
tcg: Add temp_subindex to TCGTemp
Record the location of a TCGTemp within a larger object.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: f01847c251c24beaf3a0a41764d331355d08ab54
https://github.com/qemu/qemu/commit/f01847c251c24beaf3a0a41764d331355d08ab54
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M tcg/tcg.c
Log Message:
-----------
tcg: Simplify calls to temp_sync vs mem_coherent
The first thing that temp_sync does is check mem_coherent,
so there's no need for the caller to do so.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: aef8540290f46b40f225c9f6d993c77c0697ee7c
https://github.com/qemu/qemu/commit/aef8540290f46b40f225c9f6d993c77c0697ee7c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M tcg/tcg-internal.h
M tcg/tcg.c
Log Message:
-----------
tcg: Allocate TCGTemp pairs in host memory order
Allocate the first of a pair at the lower address, and the
second of a pair at the higher address. This will make it
easier to find the beginning of the larger memory block.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 89496a85b4696b797e904a65a10b0600a95a12ec
https://github.com/qemu/qemu/commit/89496a85b4696b797e904a65a10b0600a95a12ec
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M include/tcg/tcg.h
Log Message:
-----------
tcg: Move TCG_TYPE_COUNT outside enum
The count is not itself an enumerator. Move it outside to
prevent the compiler from considering it with -Wswitch-enum.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 31c96417465b0ff32d6ec1ee8ef271c6e49ab5a3
https://github.com/qemu/qemu/commit/31c96417465b0ff32d6ec1ee8ef271c6e49ab5a3
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M include/tcg/tcg.h
M tcg/tcg.c
Log Message:
-----------
tcg: Introduce tcg_type_size
Add a helper function for computing the size of a type.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 18ff36ab71bdb302028adc263e0505f09b573f73
https://github.com/qemu/qemu/commit/18ff36ab71bdb302028adc263e0505f09b573f73
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M tcg/tcg-internal.h
Log Message:
-----------
tcg: Introduce TCGCallReturnKind and TCGCallArgumentKind
Prepare to replace a bunch of separate ifdefs with a
consistent way to describe the ABI of a function call.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: c8eef960460743b6eed98036e51546b0259c63ec
https://github.com/qemu/qemu/commit/c8eef960460743b6eed98036e51546b0259c63ec
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.h
M tcg/i386/tcg-target.h
M tcg/loongarch64/tcg-target.h
M tcg/mips/tcg-target.h
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target.h
M tcg/s390x/tcg-target.h
M tcg/sparc64/tcg-target.h
M tcg/tcg.c
M tcg/tci/tcg-target.h
Log Message:
-----------
tcg: Replace TCG_TARGET_CALL_ALIGN_ARGS with TCG_TARGET_CALL_ARG_I64
For 32-bit hosts when TCG_TARGET_CALL_ALIGN_ARGS was set, use
TCG_CALL_ARG_EVEN. For 64-bit hosts, TCG_TARGET_CALL_ALIGN_ARGS
was silently ignored, so always use TCG_CALL_ARG_NORMAL.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: eb8b0224fc542120e4071f260d031278ac197155
https://github.com/qemu/qemu/commit/eb8b0224fc542120e4071f260d031278ac197155
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.h
M tcg/i386/tcg-target.h
M tcg/loongarch64/tcg-target.h
M tcg/mips/tcg-target.h
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target.h
M tcg/s390x/tcg-target.h
M tcg/sparc64/tcg-target.h
M tcg/tcg.c
M tcg/tci/tcg-target.h
Log Message:
-----------
tcg: Replace TCG_TARGET_EXTEND_ARGS with TCG_TARGET_CALL_ARG_I32
For 64-bit hosts that had TCG_TARGET_EXTEND_ARGS, set
TCG_TARGET_CALL_ARG_I32 to TCG_CALL_ARG_EXTEND.
Otherwise, use TCG_CALL_ARG_NORMAL.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e2a9dd6b6b50f678b13cfdf55d3997f16c7f96b0
https://github.com/qemu/qemu/commit/e2a9dd6b6b50f678b13cfdf55d3997f16c7f96b0
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M tcg/tcg.c
M tcg/tci/tcg-target.h
Log Message:
-----------
tcg: Use TCG_CALL_ARG_EVEN for TCI special case
Change 32-bit tci TCG_TARGET_CALL_ARG_I32 to TCG_CALL_ARG_EVEN, to
force 32-bit values to be aligned to 64-bit. With a small reorg
to the argument processing loop, this neatly replaces an ifdef for
CONFIG_TCG_INTERPRETER.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 05d019abab15882ae726da22c3334e0f4b1797e3
https://github.com/qemu/qemu/commit/05d019abab15882ae726da22c3334e0f4b1797e3
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M accel/tcg/plugin-gen.c
Log Message:
-----------
accel/tcg/plugin: Don't search for the function pointer index
The function pointer is immediately after the output and input
operands; no need to search.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ada4cb0c1cba89df3b00b6a92a6c1523c30f4396
https://github.com/qemu/qemu/commit/ada4cb0c1cba89df3b00b6a92a6c1523c30f4396
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M accel/tcg/plugin-gen.c
Log Message:
-----------
accel/tcg/plugin: Avoid duplicate copy in copy_call
We copied all of the arguments in copy_op_nocheck.
We only need to replace the one argument that we change.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: f266bec890ead3864f1f5f9805112e0fd19c5066
https://github.com/qemu/qemu/commit/f266bec890ead3864f1f5f9805112e0fd19c5066
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M accel/tcg/plugin-gen.c
Log Message:
-----------
accel/tcg/plugin: Use copy_op in append_{udata,mem}_cb
Better to re-use the existing function for copying ops.
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d44789434bbf51bb4d4a3402066d281fa0efc88c
https://github.com/qemu/qemu/commit/d44789434bbf51bb4d4a3402066d281fa0efc88c
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M accel/tcg/plugin-gen.c
M include/tcg/tcg-op.h
M include/tcg/tcg.h
M tcg/optimize.c
M tcg/tcg-op-vec.c
M tcg/tcg-op.c
M tcg/tcg.c
Log Message:
-----------
tcg: Pass number of arguments to tcg_emit_op() / tcg_op_insert_*()
In order to have variable size allocated TCGOp, pass the number
of arguments we use (and would allocate) up to tcg_op_alloc().
This alters tcg_emit_op(), tcg_op_insert_before() and
tcg_op_insert_after() prototypes.
In tcg_op_alloc() ensure the number of arguments is in range.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
[PMD: Extracted from bigger patch]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221218211832.73312-2-philmd@linaro.org>
Commit: cb10bc63b70737eafaceac1bf1d97730ce6d3393
https://github.com/qemu/qemu/commit/cb10bc63b70737eafaceac1bf1d97730ce6d3393
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M accel/tcg/plugin-gen.c
M include/exec/helper-head.h
M include/tcg/tcg.h
M tcg/tcg.c
Log Message:
-----------
tcg: Vary the allocation size for TCGOp
We have been allocating a worst case number of arguments
to support calls. Instead, allow the size to vary.
By default leave space for 4 args, to maximize reuse,
but allow calls to increase the number of args to 32.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
[PMD: Split patch in two]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221218211832.73312-3-philmd@linaro.org>
Commit: 31fd884b2e53dc50328dd616667c745fc4808fd1
https://github.com/qemu/qemu/commit/31fd884b2e53dc50328dd616667c745fc4808fd1
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M include/tcg/tcg.h
M tcg/tcg.c
Log Message:
-----------
tcg: Use output_pref wrapper function
We will shortly have the possibility of more that two outputs,
though only for calls (for which preferences are moot). Avoid
direct references to op->output_pref[] when possible.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 39004a71d8f6b61501e41be21cc874272c78212f
https://github.com/qemu/qemu/commit/39004a71d8f6b61501e41be21cc874272c78212f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M include/exec/helper-head.h
M include/tcg/tcg.h
M tcg/optimize.c
M tcg/tcg-internal.h
M tcg/tcg.c
Log Message:
-----------
tcg: Reorg function calls
Pre-compute the function call layout for each helper at startup.
Drop TCG_CALL_DUMMY_ARG, as we no longer need to leave gaps
in the op->args[] array. This allows several places to stop
checking for NULL TCGTemp, to which TCG_CALL_DUMMY_ARG mapped.
For tcg_gen_callN, loop over the arguments once. Allocate the TCGOp
for the call early but delay emitting it, collecting arguments first.
This allows the argument processing loop to emit code for extensions
and have them sequenced before the call.
For tcg_reg_alloc_call, loop over the arguments in reverse order,
which allows stack slots to be filled first naturally.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: c6ef8c7b350bdbb24cca9206f5b9aa577e5abafa
https://github.com/qemu/qemu/commit/c6ef8c7b350bdbb24cca9206f5b9aa577e5abafa
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M tcg/tcg.c
Log Message:
-----------
tcg: Convert typecode_to_ffi from array to function
In the unlikely case of invalid typecode mask, the function
will abort instead of returning a NULL pointer.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221111074101.2069454-27-richard.henderson@linaro.org>
[PMD: Split from bigger patch]
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221122180804.938-2-philmd@linaro.org>
Commit: 0c22e17658a583c3d37cd928653caebf6406abd4
https://github.com/qemu/qemu/commit/0c22e17658a583c3d37cd928653caebf6406abd4
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M tcg/tcg.c
Log Message:
-----------
tcg: Factor init_ffi_layouts() out of tcg_context_init()
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221111074101.2069454-27-richard.henderson@linaro.org>
[PMD: Split from bigger patch]
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221122180804.938-3-philmd@linaro.org>
Commit: f9c4bb804d4bf485b892f3c6523d18025a38550e
https://github.com/qemu/qemu/commit/f9c4bb804d4bf485b892f3c6523d18025a38550e
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M tcg/tcg-internal.h
M tcg/tcg.c
Log Message:
-----------
tcg: Move ffi_cif pointer into TCGHelperInfo
Instead of requiring a separate hash table lookup,
put a pointer to the CIF into TCGHelperInfo.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221111074101.2069454-27-richard.henderson@linaro.org>
[PMD: Split from bigger patch]
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221122180804.938-4-philmd@linaro.org>
Commit: fa3cb9f9ffc9298d28b1a932946564aaefe101d1
https://github.com/qemu/qemu/commit/fa3cb9f9ffc9298d28b1a932946564aaefe101d1
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
Log Message:
-----------
tcg/aarch64: Merge tcg_out_callr into tcg_out_call
There is only one use, and BLR is perhaps even more
self-documentary than CALLR.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: cee44b037b7e40c74401f7a87bef32f6680483c7
https://github.com/qemu/qemu/commit/cee44b037b7e40c74401f7a87bef32f6680483c7
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/i386/tcg-target.c.inc
M tcg/loongarch64/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/s390x/tcg-target.c.inc
M tcg/sparc64/tcg-target.c.inc
M tcg/tcg.c
M tcg/tci/tcg-target.c.inc
Log Message:
-----------
tcg: Add TCGHelperInfo argument to tcg_out_call
This eliminates an ifdef for TCI, and will be required for
expanding the call for TCGv_i128.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 1b660f42efd721e4bcb5548907ba8d1370053318
https://github.com/qemu/qemu/commit/1b660f42efd721e4bcb5548907ba8d1370053318
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M accel/tcg/tb-maint.c
Log Message:
-----------
accel/tcg: Fix tb_invalidate_phys_page_unwind
When called from syscall(), we are not within a TB and pc == 0.
We can skip the check for invalidating the current TB.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 177a8cb83bcf2c8eb013b997173a25339a7ce86f
https://github.com/qemu/qemu/commit/177a8cb83bcf2c8eb013b997173a25339a7ce86f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M accel/tcg/user-exec.c
Log Message:
-----------
accel/tcg: Use g_free_rcu for user-exec interval trees
Because we allow lockless lookups, we have to be careful
when it is freed. Use rcu to delay the free until safe.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e630c0126c561b7db26790e8288c4fe9b61ae8dc
https://github.com/qemu/qemu/commit/e630c0126c561b7db26790e8288c4fe9b61ae8dc
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M accel/tcg/user-exec.c
Log Message:
-----------
accel/tcg: Handle false negative lookup in page_check_range
As in page_get_flags, we need to try again with the mmap
lock held if we fail a page lookup.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d4846c33ebe04d2141dcc613b5558d2f1d8077af
https://github.com/qemu/qemu/commit/d4846c33ebe04d2141dcc613b5558d2f1d8077af
Author: Ilya Leoshkevich <iii@linux.ibm.com>
Date: 2023-01-05 (Thu, 05 Jan 2023)
Changed paths:
M tests/tcg/multiarch/Makefile.target
M tests/tcg/multiarch/munmap-pthread.c
A tests/tcg/multiarch/nop_func.h
A tests/tcg/multiarch/vma-pthread.c
Log Message:
-----------
tests/tcg/multiarch: add vma-pthread.c
Add a test that locklessly changes and exercises page protection bits
from various threads. This helps catch race conditions in the VMA
handling.
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20221223120252.513319-1-iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: aaa90fede5d10e2a3c3fc7f2df608128d2cba761
https://github.com/qemu/qemu/commit/aaa90fede5d10e2a3c3fc7f2df608128d2cba761
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-01-06 (Fri, 06 Jan 2023)
Changed paths:
M accel/tcg/cputlb.c
M accel/tcg/plugin-gen.c
M accel/tcg/tb-maint.c
M accel/tcg/user-exec.c
M docs/devel/atomics.rst
M docs/devel/index-tcg.rst
A docs/devel/tcg-ops.rst
M docs/devel/tcg.rst
M hw/core/cpu-common.c
M hw/mips/mips_int.c
M hw/ppc/ppc.c
M include/exec/helper-head.h
M include/qemu/main-loop.h
M include/tcg/tcg-op.h
M include/tcg/tcg.h
M meson.build
M target/ppc/excp_helper.c
M target/ppc/helper_regs.c
M target/riscv/cpu_helper.c
M target/sparc/translate.c
R tcg/README
M tcg/aarch64/tcg-target.c.inc
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.c.inc
M tcg/arm/tcg-target.h
M tcg/i386/tcg-target.c.inc
M tcg/i386/tcg-target.h
M tcg/loongarch64/tcg-target.c.inc
M tcg/loongarch64/tcg-target.h
M tcg/mips/tcg-target.c.inc
M tcg/mips/tcg-target.h
M tcg/optimize.c
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/riscv/tcg-target.h
M tcg/s390x/tcg-target.c.inc
M tcg/s390x/tcg-target.h
M tcg/sparc64/tcg-target.c.inc
M tcg/sparc64/tcg-target.h
M tcg/tcg-internal.h
M tcg/tcg-op-vec.c
M tcg/tcg-op.c
M tcg/tcg.c
M tcg/tci.c
M tcg/tci/tcg-target.c.inc
M tcg/tci/tcg-target.h
M tests/tcg/multiarch/Makefile.target
M tests/tcg/multiarch/munmap-pthread.c
A tests/tcg/multiarch/nop_func.h
A tests/tcg/multiarch/vma-pthread.c
Log Message:
-----------
Merge tag 'pull-tcg-20230105' of https://gitlab.com/rth7680/qemu into staging
Fix race conditions in new user-only vma tracking.
Add tcg backend paired register allocation.
Cleanup tcg backend function call abi.
# gpg: Signature made Fri 06 Jan 2023 03:12:17 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
[full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20230105' of https://gitlab.com/rth7680/qemu: (47 commits)
tests/tcg/multiarch: add vma-pthread.c
accel/tcg: Handle false negative lookup in page_check_range
accel/tcg: Use g_free_rcu for user-exec interval trees
accel/tcg: Fix tb_invalidate_phys_page_unwind
tcg: Add TCGHelperInfo argument to tcg_out_call
tcg/aarch64: Merge tcg_out_callr into tcg_out_call
tcg: Move ffi_cif pointer into TCGHelperInfo
tcg: Factor init_ffi_layouts() out of tcg_context_init()
tcg: Convert typecode_to_ffi from array to function
tcg: Reorg function calls
tcg: Use output_pref wrapper function
tcg: Vary the allocation size for TCGOp
tcg: Pass number of arguments to tcg_emit_op() / tcg_op_insert_*()
accel/tcg/plugin: Use copy_op in append_{udata,mem}_cb
accel/tcg/plugin: Avoid duplicate copy in copy_call
accel/tcg/plugin: Don't search for the function pointer index
tcg: Use TCG_CALL_ARG_EVEN for TCI special case
tcg: Replace TCG_TARGET_EXTEND_ARGS with TCG_TARGET_CALL_ARG_I32
tcg: Replace TCG_TARGET_CALL_ALIGN_ARGS with TCG_TARGET_CALL_ARG_I64
tcg: Introduce TCGCallReturnKind and TCGCallArgumentKind
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/171033e8dbac...aaa90fede5d1