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[Qemu-commits] [qemu/qemu] b55a8d: tcg: Split out tcg_out_exit_tb
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] b55a8d: tcg: Split out tcg_out_exit_tb |
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Date: |
Thu, 19 Jan 2023 07:05:22 -0800 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: b55a8d9d0bb486c0ad7a34985ec43f22fae930c3
https://github.com/qemu/qemu/commit/b55a8d9d0bb486c0ad7a34985ec43f22fae930c3
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/i386/tcg-target.c.inc
M tcg/loongarch64/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/s390x/tcg-target.c.inc
M tcg/sparc64/tcg-target.c.inc
M tcg/tcg.c
M tcg/tci/tcg-target.c.inc
Log Message:
-----------
tcg: Split out tcg_out_exit_tb
The INDEX_op_exit_tb opcode needs no register allocation.
Split out a dedicated helper function for it.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 3bb8500ef83613cf3d113041b4ba3104136d9aaf
https://github.com/qemu/qemu/commit/3bb8500ef83613cf3d113041b4ba3104136d9aaf
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M tcg/i386/tcg-target.c.inc
Log Message:
-----------
tcg/i386: Remove unused goto_tb code for indirect jump
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: cea583d13cb5afdd0d9ac12cb91841f8f33008f7
https://github.com/qemu/qemu/commit/cea583d13cb5afdd0d9ac12cb91841f8f33008f7
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Remove unused goto_tb code for indirect jump
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 1ce41e044391120e8dd74fc7c9119747fb072632
https://github.com/qemu/qemu/commit/1ce41e044391120e8dd74fc7c9119747fb072632
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M tcg/sparc64/tcg-target.c.inc
Log Message:
-----------
tcg/sparc64: Remove unused goto_tb code for indirect jump
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 7f83167c612438bb46ef01b5b23f7b2a0827bdc4
https://github.com/qemu/qemu/commit/7f83167c612438bb46ef01b5b23f7b2a0827bdc4
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/loongarch64/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/tci/tcg-target.c.inc
Log Message:
-----------
tcg: Replace asserts on tcg_jmp_insn_offset
Test TCG_TARGET_HAS_direct_jump instead of testing an
implementation pointer.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: b52a2c03b7d36694c21d70bcd46d68aaba5b0840
https://github.com/qemu/qemu/commit/b52a2c03b7d36694c21d70bcd46d68aaba5b0840
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
M tcg/i386/tcg-target.c.inc
M tcg/loongarch64/tcg-target.c.inc
M tcg/ppc/tcg-target.c.inc
M tcg/s390x/tcg-target.c.inc
M tcg/sparc64/tcg-target.c.inc
M tcg/tcg.c
Log Message:
-----------
tcg: Introduce set_jmp_insn_offset
Similar to the existing set_jmp_reset_offset. Move any assert for
TCG_TARGET_HAS_direct_jump into the new function (which now cannot
be build-time). Will be unused if TCG_TARGET_HAS_direct_jump is
constant 0, but we can't test for constant in the preprocessor,
so just mark it G_GNUC_UNUSED.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: becc452a367aa681ca0c1fcb688ae0f16b32b11f
https://github.com/qemu/qemu/commit/becc452a367aa681ca0c1fcb688ae0f16b32b11f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M tcg/arm/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/tcg.c
M tcg/tci/tcg-target.c.inc
Log Message:
-----------
tcg: Introduce get_jmp_target_addr
Similar to the existing set_jmp_reset_offset. Include the
rw->rx address space conversion done by arm and s390x, and
forgotten by mips and riscv.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: cf7d6b8e9828784d118eebb6419678d196cd51b5
https://github.com/qemu/qemu/commit/cf7d6b8e9828784d118eebb6419678d196cd51b5
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/i386/tcg-target.c.inc
M tcg/loongarch64/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/s390x/tcg-target.c.inc
M tcg/sparc64/tcg-target.c.inc
M tcg/tcg.c
M tcg/tci/tcg-target.c.inc
Log Message:
-----------
tcg: Split out tcg_out_goto_tb
The INDEX_op_goto_tb opcode needs no register allocation.
Split out a dedicated helper function for it.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 3a50f424c9e066bee18bfa9cadcd3e21003ca6bb
https://github.com/qemu/qemu/commit/3a50f424c9e066bee18bfa9cadcd3e21003ca6bb
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M accel/tcg/translate-all.c
M include/exec/exec-all.h
M tcg/tcg.c
Log Message:
-----------
tcg: Rename TB_JMP_RESET_OFFSET_INVALID to TB_JMP_OFFSET_INVALID
This will shortly be used for more than reset.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: b7e4afbd9f2f9233a37e021f9e8cce472aecdd64
https://github.com/qemu/qemu/commit/b7e4afbd9f2f9233a37e021f9e8cce472aecdd64
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M accel/tcg/translate-all.c
M include/tcg/tcg.h
M tcg/tcg-op.c
M tcg/tcg.c
Log Message:
-----------
tcg: Add gen_tb to TCGContext
This can replace four other variables that are references
into the TranslationBlock structure.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 9da6079b2695dcffd8b18890db6cafdf4dc373db
https://github.com/qemu/qemu/commit/9da6079b2695dcffd8b18890db6cafdf4dc373db
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M accel/tcg/cpu-exec.c
M include/exec/exec-all.h
M tcg/tcg.c
Log Message:
-----------
tcg: Add TranslationBlock.jmp_insn_offset
Stop overloading jmp_target_arg for both offset and address,
depending on TCG_TARGET_HAS_direct_jump. Instead, add a new
field to hold the jump insn offset and always set the target
address in jmp_target_addr[]. This will allow a tcg backend
to use either direct or indirect depending on displacement.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 0fe1c98da9d9abb8e5dc4a67c7e3bcf19aad1e85
https://github.com/qemu/qemu/commit/0fe1c98da9d9abb8e5dc4a67c7e3bcf19aad1e85
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M accel/tcg/cpu-exec.c
M tcg/aarch64/tcg-target.c.inc
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.h
M tcg/i386/tcg-target.c.inc
M tcg/i386/tcg-target.h
M tcg/loongarch64/tcg-target.c.inc
M tcg/loongarch64/tcg-target.h
M tcg/mips/tcg-target.h
M tcg/ppc/tcg-target.c.inc
M tcg/ppc/tcg-target.h
M tcg/riscv/tcg-target.h
M tcg/s390x/tcg-target.c.inc
M tcg/s390x/tcg-target.h
M tcg/sparc64/tcg-target.c.inc
M tcg/sparc64/tcg-target.h
M tcg/tci/tcg-target.h
Log Message:
-----------
tcg: Change tb_target_set_jmp_target arguments
Replace 'tc_ptr' and 'addr' with 'tb' and 'n'.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 0012e3516e0f47b3aaf9213aea2c969cf6e8f42a
https://github.com/qemu/qemu/commit/0012e3516e0f47b3aaf9213aea2c969cf6e8f42a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M include/tcg/tcg.h
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.h
M tcg/i386/tcg-target.h
M tcg/loongarch64/tcg-target.h
M tcg/mips/tcg-target.h
M tcg/ppc/tcg-target.h
M tcg/riscv/tcg-target.h
M tcg/s390x/tcg-target.h
M tcg/sparc64/tcg-target.h
M tcg/tci/tcg-target.h
Log Message:
-----------
tcg: Move tb_target_set_jmp_target declaration to tcg.h
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 90c0fee3a28b25d23081b3c435762cadde813ec4
https://github.com/qemu/qemu/commit/90c0fee3a28b25d23081b3c435762cadde813ec4
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M tcg/arm/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/tci/tcg-target.c.inc
Log Message:
-----------
tcg: Always define tb_target_set_jmp_target
Install empty versions for !TCG_TARGET_HAS_direct_jump hosts.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 2fd2e78d1b5281d589eabdf31a21166c80bebd80
https://github.com/qemu/qemu/commit/2fd2e78d1b5281d589eabdf31a21166c80bebd80
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M accel/tcg/cpu-exec.c
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.c.inc
M tcg/arm/tcg-target.h
M tcg/i386/tcg-target.h
M tcg/loongarch64/tcg-target.h
M tcg/mips/tcg-target.c.inc
M tcg/mips/tcg-target.h
M tcg/ppc/tcg-target.h
M tcg/riscv/tcg-target.c.inc
M tcg/riscv/tcg-target.h
M tcg/s390x/tcg-target.c.inc
M tcg/s390x/tcg-target.h
M tcg/sparc64/tcg-target.h
M tcg/tcg.c
M tcg/tci/tcg-target.c.inc
M tcg/tci/tcg-target.h
Log Message:
-----------
tcg: Remove TCG_TARGET_HAS_direct_jump
We now have the option to generate direct or indirect
goto_tb depending on the dynamic displacement, thus
the define is no longer necessary or completely accurate.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d59d83a1c38869b1e1a4f957eb939aaa8a342721
https://github.com/qemu/qemu/commit/d59d83a1c38869b1e1a4f957eb939aaa8a342721
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
M tcg/aarch64/tcg-target.h
Log Message:
-----------
tcg/aarch64: Reorg goto_tb implementation
The old implementation replaces two insns, swapping between
b <dest>
nop
br x30
and
adrp x30, <dest>
addi x30, x30, lo12:<dest>
br x30
There is a race condition in which a thread could be stopped at
the PC of the second insn, and when restarted does not see the
complete address computation and branches to nowhere.
The new implemetation replaces only one insn, swapping between
b <dest>
br tmp
and
ldr tmp, <jmp_addr>
br tmp
Reported-by: hev <r@hev.cc>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 20b6643324a79860dcdfe811ffe4a79942bca21e
https://github.com/qemu/qemu/commit/20b6643324a79860dcdfe811ffe4a79942bca21e
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M tcg/ppc/tcg-target.c.inc
M tcg/ppc/tcg-target.h
Log Message:
-----------
tcg/ppc: Reorg goto_tb implementation
The old ppc64 implementation replaces 2 or 4 insns, which leaves a race
condition in which a thread could be stopped at a PC in the middle of
the sequence, and when restarted does not see the complete address
computation and branches to nowhere.
The new implemetation replaces only one insn, swapping between
b <dest>
and
mtctr r31
falling through to a general-case indirect branch.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 1e42b4f8079f7486689693187572452bbec2f158
https://github.com/qemu/qemu/commit/1e42b4f8079f7486689693187572452bbec2f158
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M tcg/sparc64/tcg-target.c.inc
Log Message:
-----------
tcg/sparc64: Remove USE_REG_TB
This is always true for sparc64, so this is dead since 3a5f6805c7ca.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: a228ae3ea7f6fa9e7eda53906471f1cfc400c114
https://github.com/qemu/qemu/commit/a228ae3ea7f6fa9e7eda53906471f1cfc400c114
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M tcg/sparc64/tcg-target.c.inc
Log Message:
-----------
tcg/sparc64: Reorg goto_tb implementation
The old sparc64 implementation may replace two insns, which leaves
a race condition in which a thread could be stopped at a PC in the
middle of the sequence, and when restarted does not see the complete
address computation and branches to nowhere.
The new implemetation replaces only one insn, swapping between a
direct branch and a direct call. The TCG_REG_TB register is loaded
from tb->jmp_target_addr[] in the delay slot.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 79ffece44472975b582f009b803d454527d43892
https://github.com/qemu/qemu/commit/79ffece44472975b582f009b803d454527d43892
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M tcg/arm/tcg-target.c.inc
Log Message:
-----------
tcg/arm: Implement direct branch for goto_tb
Now that tcg can handle direct and indirect goto_tb
simultaneously, we can optimistically leave space for
a direct branch and fall back to loading the pointer
from the TB for an indirect branch.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 9ae958e4d7504f87c2ecd5915d8c3ede7007f2e2
https://github.com/qemu/qemu/commit/9ae958e4d7504f87c2ecd5915d8c3ede7007f2e2
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M tcg/riscv/tcg-target.c.inc
Log Message:
-----------
tcg/riscv: Introduce OPC_NOP
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 493c9b19a7fb7f387c4fcf57d3836504d5242bf5
https://github.com/qemu/qemu/commit/493c9b19a7fb7f387c4fcf57d3836504d5242bf5
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2023-01-17 (Tue, 17 Jan 2023)
Changed paths:
M tcg/riscv/tcg-target.c.inc
Log Message:
-----------
tcg/riscv: Implement direct branch for goto_tb
Now that tcg can handle direct and indirect goto_tb simultaneously,
we can optimistically leave space for a direct branch and fall back
to loading the pointer from the TB for an indirect branch.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ef4f031fab7b070816454949a1b6b6c7aa3cf503
https://github.com/qemu/qemu/commit/ef4f031fab7b070816454949a1b6b6c7aa3cf503
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-01-19 (Thu, 19 Jan 2023)
Changed paths:
M accel/tcg/cpu-exec.c
M accel/tcg/translate-all.c
M include/exec/exec-all.h
M include/tcg/tcg.h
M tcg/aarch64/tcg-target.c.inc
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.c.inc
M tcg/arm/tcg-target.h
M tcg/i386/tcg-target.c.inc
M tcg/i386/tcg-target.h
M tcg/loongarch64/tcg-target.c.inc
M tcg/loongarch64/tcg-target.h
M tcg/mips/tcg-target.c.inc
M tcg/mips/tcg-target.h
M tcg/ppc/tcg-target.c.inc
M tcg/ppc/tcg-target.h
M tcg/riscv/tcg-target.c.inc
M tcg/riscv/tcg-target.h
M tcg/s390x/tcg-target.c.inc
M tcg/s390x/tcg-target.h
M tcg/sparc64/tcg-target.c.inc
M tcg/sparc64/tcg-target.h
M tcg/tcg-op.c
M tcg/tcg.c
M tcg/tci/tcg-target.c.inc
M tcg/tci/tcg-target.h
Log Message:
-----------
Merge tag 'pull-tcg-20230117' of https://gitlab.com/rth7680/qemu into staging
tcg: Fix race conditions in (most) goto_tb implementations
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* tag 'pull-tcg-20230117' of https://gitlab.com/rth7680/qemu: (22 commits)
tcg/riscv: Implement direct branch for goto_tb
tcg/riscv: Introduce OPC_NOP
tcg/arm: Implement direct branch for goto_tb
tcg/sparc64: Reorg goto_tb implementation
tcg/sparc64: Remove USE_REG_TB
tcg/ppc: Reorg goto_tb implementation
tcg/aarch64: Reorg goto_tb implementation
tcg: Remove TCG_TARGET_HAS_direct_jump
tcg: Always define tb_target_set_jmp_target
tcg: Move tb_target_set_jmp_target declaration to tcg.h
tcg: Change tb_target_set_jmp_target arguments
tcg: Add TranslationBlock.jmp_insn_offset
tcg: Add gen_tb to TCGContext
tcg: Rename TB_JMP_RESET_OFFSET_INVALID to TB_JMP_OFFSET_INVALID
tcg: Split out tcg_out_goto_tb
tcg: Introduce get_jmp_target_addr
tcg: Introduce set_jmp_insn_offset
tcg: Replace asserts on tcg_jmp_insn_offset
tcg/sparc64: Remove unused goto_tb code for indirect jump
tcg/ppc: Remove unused goto_tb code for indirect jump
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/701ed34833f5...ef4f031fab7b