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[Qemu-commits] [qemu/qemu] fdf029: xlnx_dpdma: fix descriptor endianness


From: Richard Henderson
Subject: [Qemu-commits] [qemu/qemu] fdf029: xlnx_dpdma: fix descriptor endianness bug
Date: Tue, 28 May 2024 11:28:22 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: fdf029762f50101a3d7927d8db1be015e00f441c
      
https://github.com/qemu/qemu/commit/fdf029762f50101a3d7927d8db1be015e00f441c
  Author: Alexandra Diupina <adiupina@astralinux.ru>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M hw/dma/xlnx_dpdma.c

  Log Message:
  -----------
  xlnx_dpdma: fix descriptor endianness bug

Add xlnx_dpdma_read_descriptor() and
xlnx_dpdma_write_descriptor() functions.
xlnx_dpdma_read_descriptor() combines reading a
descriptor from desc_addr by calling dma_memory_read()
and swapping the desc fields from guest memory order
to host memory order. xlnx_dpdma_write_descriptor()
performs similar actions when writing a descriptor.

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Fixes: d3c6369a96 ("introduce xlnx-dpdma")
Signed-off-by: Alexandra Diupina <adiupina@astralinux.ru>
[PMM: tweaked indent, dropped behaviour change for write-failure case]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 19ed42e8adc87a3c739f61608b66a046bb9237e2
      
https://github.com/qemu/qemu/commit/19ed42e8adc87a3c739f61608b66a046bb9237e2
  Author: Zenghui Yu <zenghui.yu@linux.dev>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/hvf/hvf.c

  Log Message:
  -----------
  hvf: arm: Fix encodings for ID_AA64PFR1_EL1 and debug System registers

We wrongly encoded ID_AA64PFR1_EL1 using {3,0,0,4,2} in hvf_sreg_match[] so
we fail to get the expected ARMCPRegInfo from cp_regs hash table with the
wrong key.

Fix it with the correct encoding {3,0,0,4,1}. With that fixed, the Linux
guest can properly detect FEAT_SSBS2 on my M1 HW.

All DBG{B,W}{V,C}R_EL1 registers are also wrongly encoded with op0 == 14.
It happens to work because HVF_SYSREG(CRn, CRm, 14, op1, op2) equals to
HVF_SYSREG(CRn, CRm, 2, op1, op2), by definition. But we shouldn't rely on
it.

Cc: qemu-stable@nongnu.org
Fixes: a1477da3ddeb ("hvf: Add Apple Silicon support")
Signed-off-by: Zenghui Yu <zenghui.yu@linux.dev>
Reviewed-by: Alexander Graf <agraf@csgraf.de>
Message-id: 20240503153453.54389-1-zenghui.yu@linux.dev
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 03935f9272e757724cd99ca3842be3ddbfeecc77
      
https://github.com/qemu/qemu/commit/03935f9272e757724cd99ca3842be3ddbfeecc77
  Author: Dorjoy Chowdhury <dorjoychy111@gmail.com>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M hw/arm/npcm7xx.c

  Log Message:
  -----------
  hw/arm/npcm7xx: remove setting of mp-affinity

The value of the mp-affinity property being set in npcm7xx_realize is
always the same as the default value it would have when arm_cpu_realizefn
is called if the property is not set here. So there is no need to set
the property value in npcm7xx_realize function.

Signed-off-by: Dorjoy Chowdhury <dorjoychy111@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240504141733.14813-1-dorjoychy111@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: cd2a2788a92c39aa6405e2ff7a95aca02d036757
      
https://github.com/qemu/qemu/commit/cd2a2788a92c39aa6405e2ff7a95aca02d036757
  Author: Inès Varhol <ines.varhol@telecom-paris.fr>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M hw/char/stm32l4x5_usart.c

  Log Message:
  -----------
  hw/char: Correct STM32L4x5 usart register CR2 field ADD_0 size

Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
Message-id: 20240505141613.387508-1-ines.varhol@telecom-paris.fr
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: daafa78b297291fea36fb4daeed526705fa7c035
      
https://github.com/qemu/qemu/commit/daafa78b297291fea36fb4daeed526705fa7c035
  Author: Andrey Shumilin <shum.sdl@nppct.ru>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M hw/intc/arm_gic.c

  Log Message:
  -----------
  hw/intc/arm_gic: Fix handling of NS view of GICC_APR<n>

In gic_cpu_read() and gic_cpu_write(), we delegate the handling of
reading and writing the Non-Secure view of the GICC_APR<n> registers
to functions gic_apr_ns_view() and gic_apr_write_ns_view().
Unfortunately we got the order of the arguments wrong, swapping the
CPU number and the register number (which the compiler doesn't catch
because they're both integers).

Most guests probably didn't notice this bug because directly
accessing the APR registers is typically something only done by
firmware when it is doing state save for going into a sleep mode.

Correct the mismatched call arguments.

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Cc: qemu-stable@nongnu.org
Fixes: 51fd06e0ee ("hw/intc/arm_gic: Fix handling of GICC_APR<n>, GICC_NSAPR<n> 
registers")
Signed-off-by: Andrey Shumilin <shum.sdl@nppct.ru>
[PMM: Rewrote commit message]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée<alex.bennee@linaro.org>


  Commit: 84ce4b9b9943d26c9d9c7ea8abd924033c125535
      
https://github.com/qemu/qemu/commit/84ce4b9b9943d26c9d9c7ea8abd924033c125535
  Author: Philippe Mathieu-Daudé <philmd@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M hw/input/tsc2005.c

  Log Message:
  -----------
  hw/input/tsc2005: Fix -Wchar-subscripts warning in tsc2005_txrx()

Check the function index is in range and use an unsigned
variable to avoid the following warning with GCC 13.2.0:

  [666/5358] Compiling C object libcommon.fa.p/hw_input_tsc2005.c.o
  hw/input/tsc2005.c: In function 'tsc2005_timer_tick':
  hw/input/tsc2005.c:416:26: warning: array subscript has type 'char' 
[-Wchar-subscripts]
    416 |     s->dav |= mode_regs[s->function];
        |                         ~^~~~~~~~~~

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240508143513.44996-1-philmd@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: fixed missing ')']
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: d0a040a8c95c0cec8fab026a5d0a1aa5c7143d74
      
https://github.com/qemu/qemu/commit/d0a040a8c95c0cec8fab026a5d0a1aa5c7143d74
  Author: Tanmay Patil <tanmaynpatil105@gmail.com>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M hw/arm/boot.c
    M hw/char/omap_uart.c
    M hw/gpio/zaurus.c
    M hw/input/tsc2005.c

  Log Message:
  -----------
  hw: arm: Remove use of tabs in some source files

Some of the source files for older devices use hardcoded tabs
instead of our current coding standard's required spaces.
Fix these in the following files:
        - hw/arm/boot.c
        - hw/char/omap_uart.c
        - hw/gpio/zaurus.c
        - hw/input/tsc2005.c

This commit is mostly whitespace-only changes; it also
adds curly-braces to some 'if' statements.

This addresses part of https://gitlab.com/qemu-project/qemu/-/issues/373
but some other files remain to be handled.

Signed-off-by: Tanmay Patil <tanmaynpatil105@gmail.com>
Message-id: 20240508081502.88375-1-tanmaynpatil105@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: tweaked commit message]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 2fda0e776ae5360910f3521ec2608b535f338d90
      
https://github.com/qemu/qemu/commit/2fda0e776ae5360910f3521ec2608b535f338d90
  Author: Rayhan Faizel <rayhan.faizel@gmail.com>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M docs/system/arm/raspi.rst

  Log Message:
  -----------
  docs/system: Remove ADC from raspi documentation

None of the RPi boards have ADC on-board. In real life, an external ADC chip
is required to operate on analog signals.

Signed-off-by: Rayhan Faizel <rayhan.faizel@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240512085716.222326-1-rayhan.faizel@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: db36e14501e8745a6e23f611f917d40a27cc5dee
      
https://github.com/qemu/qemu/commit/db36e14501e8745a6e23f611f917d40a27cc5dee
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/t32.decode
    M target/arm/tcg/translate.c

  Log Message:
  -----------
  target/arm: Use PLD, PLDW, PLI not NOP for t32

This fixes a bug in that neither PLI nor PLDW are present in ARMv6T2,
but are introduced with ARMv7 and ARMv7MP respectively.
For clarity, do not use NOP for PLD.

Note that there is no PLDW (literal). Architecturally in the
T1 encoding of "PLD (literal)" bit 5 is "(0)", which means
that it should be zero and if it is not then the behaviour
is CONSTRAINED UNPREDICTABLE (might UNDEF, NOP, or ignore the
value of the bit).

In our implementation we have patterns for both:

+    PLD          1111 1000 -001 1111 1111 ------------        # (literal)
+    PLD          1111 1000 -011 1111 1111 ------------        # (literal)

and so we effectively ignore the value of bit 5.  (This is a
permitted option for this CONSTRAINED UNPREDICTABLE.) This isn't a
behaviour change in this commit, since we previously had NOP lines
for both those patterns.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240524232121.284515-3-richard.henderson@linaro.org
[PMM: adjusted commit message to note that PLD (lit) T1 bit 5
being 1 is an UNPREDICTABLE case.]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: fe84877ed44040dc128362b61dbfd923b851d6ef
      
https://github.com/qemu/qemu/commit/fe84877ed44040dc128362b61dbfd923b851d6ef
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Zero-extend writeback for fp16 FCVTZS (scalar, integer)

Fixes RISU mismatch for "fcvtzs h31, h0, #14".

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240524232121.284515-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: c0ca7ed049c468647e9e5239f4275565dcc39179
      
https://github.com/qemu/qemu/commit/c0ca7ed049c468647e9e5239f4275565dcc39179
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Fix decode of FMOV (hp) vs MOVI

The decode of FMOV (vector, immediate, half-precision) vs
invalid cases of MOVI are incorrect.

Fixes RISU mismatch for invalid insn 0x2f01fd31.

Fixes: 70b4e6a4457 ("arm/translate-a64: add FP16 FMOV to simd_mod_imm")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240524232121.284515-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 5d874e5da23846c40dcb6d73a4c47bb95ff54372
      
https://github.com/qemu/qemu/commit/5d874e5da23846c40dcb6d73a4c47bb95ff54372
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Verify sz=0 for Advanced SIMD scalar pairwise (fp16)

All of these insns have "if sz == '1' then UNDEFINED" in their pseudocode.
Fixes a RISU miscompare for invalid insn 0x5ef0c87a.

Fixes: 5c36d89567c ("arm/translate-a64: add all FP16 ops in 
simd_scalar_pairwise")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240524232121.284515-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 09a52d854aec39b1f6aa12a6f034dbdb424419cf
      
https://github.com/qemu/qemu/commit/09a52d854aec39b1f6aa12a6f034dbdb424419cf
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    A target/arm/tcg/gengvec.c
    M target/arm/tcg/meson.build
    M target/arm/tcg/translate.c
    M target/arm/tcg/translate.h

  Log Message:
  -----------
  target/arm: Split out gengvec.c

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: a11efe30b9fc33ecc38255019d7ed7c750ec27ba
      
https://github.com/qemu/qemu/commit/a11efe30b9fc33ecc38255019d7ed7c750ec27ba
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    A target/arm/tcg/gengvec64.c
    M target/arm/tcg/meson.build
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate-a64.h
    M target/arm/tcg/translate-sve.c

  Log Message:
  -----------
  target/arm: Split out gengvec64.c

Split some routines out of translate-a64.c and translate-sve.c
that are used by both.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 8424801eb583d1d27b343062dc70a0f61aadc213
      
https://github.com/qemu/qemu/commit/8424801eb583d1d27b343062dc70a0f61aadc213
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert Cryptographic AES to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: c5fb9b4fad2a7c9577561264cb6364c546f66bb4
      
https://github.com/qemu/qemu/commit/c5fb9b4fad2a7c9577561264cb6364c546f66bb4
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert Cryptographic 3-register SHA to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 66d1e1a402642cc6c9a0fda815add18e7164db78
      
https://github.com/qemu/qemu/commit/66d1e1a402642cc6c9a0fda815add18e7164db78
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert Cryptographic 2-register SHA to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 7010e36676bb369da14f1e8be9ed0885555f0c5c
      
https://github.com/qemu/qemu/commit/7010e36676bb369da14f1e8be9ed0885555f0c5c
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert Cryptographic 3-register SHA512 to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 54b8230107341d027a3b1ac1eeb6f55ad7feb70d
      
https://github.com/qemu/qemu/commit/54b8230107341d027a3b1ac1eeb6f55ad7feb70d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert Cryptographic 2-register SHA512 to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 50941556ff062f3a41aab04ef449c2ed5f5a8331
      
https://github.com/qemu/qemu/commit/50941556ff062f3a41aab04ef449c2ed5f5a8331
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert Cryptographic 4-register to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-15-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 376bb8a45dca7693b58831e3776038f43e450e0c
      
https://github.com/qemu/qemu/commit/376bb8a45dca7693b58831e3776038f43e450e0c
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert Cryptographic 3-register, imm2 to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: d90a473363c722b209b201e6cd3484b2d1819201
      
https://github.com/qemu/qemu/commit/d90a473363c722b209b201e6cd3484b2d1819201
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert XAR to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-17-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: d6edf915c73d447a626d527fb75f43c60ebe6147
      
https://github.com/qemu/qemu/commit/d6edf915c73d447a626d527fb75f43c60ebe6147
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert Advanced SIMD copy to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-18-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: cb1c77feef6578ffb7bffeed69c4d9b5f01abf03
      
https://github.com/qemu/qemu/commit/cb1c77feef6578ffb7bffeed69c4d9b5f01abf03
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/helper-a64.h
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/vec_helper.c

  Log Message:
  -----------
  target/arm: Convert FMULX to decodetree

Convert all forms (scalar, vector, scalar indexed, vector indexed),
which allows us to remove switch table entries elsewhere.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-19-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: e0300a9a5e104753c8a81bd93d66e95de4dfbc77
      
https://github.com/qemu/qemu/commit/e0300a9a5e104753c8a81bd93d66e95de4dfbc77
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/helper-a64.h
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate.h
    M target/arm/tcg/vec_helper.c

  Log Message:
  -----------
  target/arm: Convert FADD, FSUB, FDIV, FMUL to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-20-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: a1e250fc7177be91107e90d441ec6fd13c26d2d6
      
https://github.com/qemu/qemu/commit/a1e250fc7177be91107e90d441ec6fd13c26d2d6
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/vec_helper.c

  Log Message:
  -----------
  target/arm: Convert FMAX, FMIN, FMAXNM, FMINNM to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-21-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 3938f94175283ab709b5082704dbf772c8c4be61
      
https://github.com/qemu/qemu/commit/3938f94175283ab709b5082704dbf772c8c4be61
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/translate-vfp.c

  Log Message:
  -----------
  target/arm: Introduce vfp_load_reg16

Load and zero-extend float16 into a TCGv_i32 before
all scalar operations.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240524232121.284515-22-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 21e885aff407a3d7c74408387e80e9a38fae8fbb
      
https://github.com/qemu/qemu/commit/21e885aff407a3d7c74408387e80e9a38fae8fbb
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate-vfp.c
    M target/arm/tcg/translate.h
    M target/arm/vfp_helper.c

  Log Message:
  -----------
  target/arm: Expand vfp neg and abs inline

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-23-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 69cefabcac501c4837605ceb87b5f6527de547d7
      
https://github.com/qemu/qemu/commit/69cefabcac501c4837605ceb87b5f6527de547d7
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert FNMUL to decodetree

This is the last instruction within disas_fp_2src,
so remove that and its subroutines.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-24-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 2d558efbf53ad008e56124ff9e5dad94504a620d
      
https://github.com/qemu/qemu/commit/2d558efbf53ad008e56124ff9e5dad94504a620d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/vec_helper.c

  Log Message:
  -----------
  target/arm: Convert FMLA, FMLS to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-25-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 4fe068fac000fe8182a334c3bd5bb4bfe7a0f1e9
      
https://github.com/qemu/qemu/commit/4fe068fac000fe8182a334c3bd5bb4bfe7a0f1e9
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/vec_helper.c

  Log Message:
  -----------
  target/arm: Convert FCMEQ, FCMGE, FCMGT, FACGE, FACGT to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-26-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 43454734c49e8289c4068f19a7f10beac6ba953c
      
https://github.com/qemu/qemu/commit/43454734c49e8289c4068f19a7f10beac6ba953c
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/vec_helper.c

  Log Message:
  -----------
  target/arm: Convert FABD to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-27-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 13db93bce56c894fb42d0bf7e45aa1db98ce8377
      
https://github.com/qemu/qemu/commit/13db93bce56c894fb42d0bf7e45aa1db98ce8377
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert FRECPS, FRSQRTS to decodetree

These are the last instructions within handle_3same_float
and disas_simd_scalar_three_reg_same_fp16 so remove them.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-28-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 57801ca0ea91d224a10c579d430d4e5426837802
      
https://github.com/qemu/qemu/commit/57801ca0ea91d224a10c579d430d4e5426837802
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/vec_helper.c

  Log Message:
  -----------
  target/arm: Convert FADDP to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-29-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: a13f9fb5bf645fc1a6d63f346ab6c9072de6f7d5
      
https://github.com/qemu/qemu/commit/a13f9fb5bf645fc1a6d63f346ab6c9072de6f7d5
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/vec_helper.c

  Log Message:
  -----------
  target/arm: Convert FMAXP, FMINP, FMAXNMP, FMINNMP to decodetree

These are the last instructions within disas_simd_three_reg_same_fp16,
so remove it.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-30-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: c43a23e1aa2cdcef058a3486d23f5206908023e1
      
https://github.com/qemu/qemu/commit/c43a23e1aa2cdcef058a3486d23f5206908023e1
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/translate-neon.c
    M target/arm/tcg/vec_helper.c

  Log Message:
  -----------
  target/arm: Use gvec for neon faddp, fmaxp, fminp

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-31-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: a7e4eec6fbcc12aabc50486f50097950036e1faf
      
https://github.com/qemu/qemu/commit/a7e4eec6fbcc12aabc50486f50097950036e1faf
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/a64.decode
    M target/arm/tcg/gengvec.c
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate.h
    M target/arm/tcg/vec_helper.c

  Log Message:
  -----------
  target/arm: Convert ADDP to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-32-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: a11e54ed298f97200f3c1a1ecccf058aeecab714
      
https://github.com/qemu/qemu/commit/a11e54ed298f97200f3c1a1ecccf058aeecab714
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/neon_helper.c
    M target/arm/tcg/translate-neon.c

  Log Message:
  -----------
  target/arm: Use gvec for neon padd

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-33-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 28b5451bec8d68af3f93e7f5e18c86ad1b47930f
      
https://github.com/qemu/qemu/commit/28b5451bec8d68af3f93e7f5e18c86ad1b47930f
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/a64.decode
    M target/arm/tcg/gengvec.c
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate.h
    M target/arm/tcg/vec_helper.c

  Log Message:
  -----------
  target/arm: Convert SMAXP, SMINP, UMAXP, UMINP to decodetree

These are the last instructions within handle_simd_3same_pair
so remove it.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-34-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: a9240f482ce77fc322411c1ce647d77dfacbdf4d
      
https://github.com/qemu/qemu/commit/a9240f482ce77fc322411c1ce647d77dfacbdf4d
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/translate-neon.c

  Log Message:
  -----------
  target/arm: Use gvec for neon pmax, pmin

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-35-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 641d8231426f02ab814c9bf97fcacea076cb3ef1
      
https://github.com/qemu/qemu/commit/641d8231426f02ab814c9bf97fcacea076cb3ef1
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert FMLAL, FMLSL to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-36-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: f240df3c31b40e4cf1af1f156a88efc1a1df406c
      
https://github.com/qemu/qemu/commit/f240df3c31b40e4cf1af1f156a88efc1a1df406c
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert disas_simd_3same_logic to decodetree

This includes AND, ORR, EOR, BIC, ORN, BSF, BIT, BIF.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240524232121.284515-37-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: f8e5c833f9180a49786604e426dd3d87a22652ea
      
https://github.com/qemu/qemu/commit/f8e5c833f9180a49786604e426dd3d87a22652ea
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-28 (Tue, 28 May 2024)

  Changed paths:
    M docs/system/arm/raspi.rst
    M hw/arm/boot.c
    M hw/arm/npcm7xx.c
    M hw/char/omap_uart.c
    M hw/char/stm32l4x5_usart.c
    M hw/dma/xlnx_dpdma.c
    M hw/gpio/zaurus.c
    M hw/input/tsc2005.c
    M hw/intc/arm_gic.c
    M target/arm/helper.h
    M target/arm/hvf/hvf.c
    M target/arm/tcg/a64.decode
    A target/arm/tcg/gengvec.c
    A target/arm/tcg/gengvec64.c
    M target/arm/tcg/helper-a64.h
    M target/arm/tcg/meson.build
    M target/arm/tcg/neon_helper.c
    M target/arm/tcg/t32.decode
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate-a64.h
    M target/arm/tcg/translate-neon.c
    M target/arm/tcg/translate-sve.c
    M target/arm/tcg/translate-vfp.c
    M target/arm/tcg/translate.c
    M target/arm/tcg/translate.h
    M target/arm/tcg/vec_helper.c
    M target/arm/vfp_helper.c

  Log Message:
  -----------
  Merge tag 'pull-target-arm-20240528' of 
https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * xlnx_dpdma: fix descriptor endianness bug
 * hvf: arm: Fix encodings for ID_AA64PFR1_EL1 and debug System registers
 * hw/arm/npcm7xx: remove setting of mp-affinity
 * hw/char: Correct STM32L4x5 usart register CR2 field ADD_0 size
 * hw/intc/arm_gic: Fix handling of NS view of GICC_APR<n>
 * hw/input/tsc2005: Fix -Wchar-subscripts warning in tsc2005_txrx()
 * hw: arm: Remove use of tabs in some source files
 * docs/system: Remove ADC from raspi documentation
 * target/arm: Start of the conversion of A64 SIMD to decodetree

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# gpg: Signature made Tue 28 May 2024 07:04:43 AM PDT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" 
[full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]

* tag 'pull-target-arm-20240528' of 
https://git.linaro.org/people/pmaydell/qemu-arm: (42 commits)
  target/arm: Convert disas_simd_3same_logic to decodetree
  target/arm: Convert FMLAL, FMLSL to decodetree
  target/arm: Use gvec for neon pmax, pmin
  target/arm: Convert SMAXP, SMINP, UMAXP, UMINP to decodetree
  target/arm: Use gvec for neon padd
  target/arm: Convert ADDP to decodetree
  target/arm: Use gvec for neon faddp, fmaxp, fminp
  target/arm: Convert FMAXP, FMINP, FMAXNMP, FMINNMP to decodetree
  target/arm: Convert FADDP to decodetree
  target/arm: Convert FRECPS, FRSQRTS to decodetree
  target/arm: Convert FABD to decodetree
  target/arm: Convert FCMEQ, FCMGE, FCMGT, FACGE, FACGT to decodetree
  target/arm: Convert FMLA, FMLS to decodetree
  target/arm: Convert FNMUL to decodetree
  target/arm: Expand vfp neg and abs inline
  target/arm: Introduce vfp_load_reg16
  target/arm: Convert FMAX, FMIN, FMAXNM, FMINNM to decodetree
  target/arm: Convert FADD, FSUB, FDIV, FMUL to decodetree
  target/arm: Convert FMULX to decodetree
  target/arm: Convert Advanced SIMD copy to decodetree
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/ad10b4badc1d...f8e5c833f918

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