qemu-commits
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-commits] [qemu/qemu] f5e328: hw/intc/arm_gic: Fix set pending of P


From: Richard Henderson
Subject: [Qemu-commits] [qemu/qemu] f5e328: hw/intc/arm_gic: Fix set pending of PPIs
Date: Fri, 31 May 2024 13:01:55 -0700

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: f5e328fef057a79ee40a93cdb27bf0de7991973e
      
https://github.com/qemu/qemu/commit/f5e328fef057a79ee40a93cdb27bf0de7991973e
  Author: Sebastian Huber <sebastian.huber@embedded-brains.de>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M hw/intc/arm_gic.c

  Log Message:
  -----------
  hw/intc/arm_gic: Fix set pending of PPIs

According to the GICv2 specification section 4.3.7, "Interrupt Set-Pending
Registers, GICD_ISPENDRn":

"In a multiprocessor implementation, GICD_ISPENDR0 is banked for each connected
processor. This register holds the Set-pending bits for interrupts 0-31."

Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Message-id: 20240524113256.8102-2-sebastian.huber@embedded-brains.de
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: d9aff83ad569714ec1b05176942a80fd80e062b7
      
https://github.com/qemu/qemu/commit/d9aff83ad569714ec1b05176942a80fd80e062b7
  Author: Sebastian Huber <sebastian.huber@embedded-brains.de>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M hw/intc/arm_gic.c

  Log Message:
  -----------
  hw/intc/arm_gic: Fix writes to GICD_ITARGETSRn

According to the GICv2 specification section 4.3.12, "Interrupt Processor
Targets Registers, GICD_ITARGETSRn":

"Any change to a CPU targets field value:
[...]
* Has an effect on any pending interrupts. This means:
  - adding a CPU interface to the target list of a pending interrupt makes that
    interrupt pending on that CPU interface
  - removing a CPU interface from the target list of a pending interrupt
    removes the pending state of that interrupt on that CPU interface."

Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Message-id: 20240524113256.8102-3-sebastian.huber@embedded-brains.de
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: f271877307f1bb43ac4031bf6d962bdd86caa498
      
https://github.com/qemu/qemu/commit/f271877307f1bb43ac4031bf6d962bdd86caa498
  Author: Sebastian Huber <sebastian.huber@embedded-brains.de>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M hw/arm/Kconfig
    M hw/arm/xilinx_zynq.c

  Log Message:
  -----------
  hw/arm/xilinx_zynq: Add cache controller

The Zynq 7000 SoCs contain a CoreLink L2C-310 cache controller.  Add the
corresponding Qemu device to the xilinx-zynq-a9 machine.

Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Message-id: 20240524120837.10057-2-sebastian.huber@embedded-brains.de
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: ddcf58e044ce02864170b41785344407cb821e12
      
https://github.com/qemu/qemu/commit/ddcf58e044ce02864170b41785344407cb821e12
  Author: Sebastian Huber <sebastian.huber@embedded-brains.de>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M hw/arm/xilinx_zynq.c

  Log Message:
  -----------
  hw/arm/xilinx_zynq: Support up to two CPU cores

The Zynq 7000 SoCs contain two Arm Cortex-A9 MPCore (the Zynq 7000S have only
one core).  Add support for up to two simulated cores.

Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Message-id: 20240524120837.10057-3-sebastian.huber@embedded-brains.de
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: removed unnecessary double-cast]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: c19779ce18229a7a01e276ef68c9ce98998fc113
      
https://github.com/qemu/qemu/commit/c19779ce18229a7a01e276ef68c9ce98998fc113
  Author: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M tests/avocado/machine_aarch64_sbsaref.py

  Log Message:
  -----------
  tests/avocado: update sbsa-ref firmware

Partial support for NUMA setup:
- cpu nodes
- memory nodes

Used versions:

- Trusted Firmware v2.11.0
- Tianocore EDK2 stable202405
- Tianocore EDK2 Platforms code commit 4bbd0ed

Firmware is built using Debian 'bookworm' cross toolchain (gcc 12.2.0).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: b1d592e7b0a7301eae8e3baa99744ac35db3cd2a
      
https://github.com/qemu/qemu/commit/b1d592e7b0a7301eae8e3baa99744ac35db3cd2a
  Author: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M hw/arm/sbsa-ref.c

  Log Message:
  -----------
  arm/sbsa-ref: move to Neoverse-N2 as default

Moving to Neoverse-N2 gives us several cpu features to use for expanding
our platform:

- branch target identification
- pointer authentication
- RME for confidential computing
- RNG for EFI_PROTOCOL_RNG
- SVE being enabled by default

We do not go for "max" as default to have stable set of features enabled
by default. It is still supported and can be selected with "--cpu"
argument.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Message-id: 20240523165353.6547-1-marcin.juszkiewicz@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 76f4a8aecae7f287d6e7f3b763ae88382c3a5457
      
https://github.com/qemu/qemu/commit/76f4a8aecae7f287d6e7f3b763ae88382c3a5457
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/gengvec.c

  Log Message:
  -----------
  target/arm: Improve vector UQADD, UQSUB, SQADD, SQSUB

No need for a full comparison; xor produces non-zero bits
for QC just fine.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 01d5665bc33c3eeadd3d11d8f2446b40601eae17
      
https://github.com/qemu/qemu/commit/01d5665bc33c3eeadd3d11d8f2446b40601eae17
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/gengvec.c

  Log Message:
  -----------
  target/arm: Assert oprsz in range when using vfp.qc

Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240528203044.612851-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 8f6343ae18d745653a4668cc0924016444d76460
      
https://github.com/qemu/qemu/commit/8f6343ae18d745653a4668cc0924016444d76460
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/gengvec64.c
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate-a64.h
    M target/arm/tcg/vec_helper.c

  Log Message:
  -----------
  target/arm: Convert SUQADD and USQADD to gvec

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 1217edace8a5f1f8c4eb7f0648ff47eccd08bc8e
      
https://github.com/qemu/qemu/commit/1217edace8a5f1f8c4eb7f0648ff47eccd08bc8e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/gengvec64.c
    M target/arm/tcg/neon_helper.c
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate-a64.h

  Log Message:
  -----------
  target/arm: Inline scalar SUQADD and USQADD

This eliminates the last uses of these neon helpers.
Incorporate the MO_64 expanders as an option to the vector expander.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: f4fa83d6148f9d9bbd543c776e6cdc919c43c8e3
      
https://github.com/qemu/qemu/commit/f4fa83d6148f9d9bbd543c776e6cdc919c43c8e3
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/gengvec.c
    M target/arm/tcg/neon_helper.c
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate.h

  Log Message:
  -----------
  target/arm: Inline scalar SQADD, UQADD, SQSUB, UQSUB

This eliminates the last uses of these neon helpers.
Incorporate the MO_64 expanders as an option to the vector expander.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: aaf03a399af539e40c7f9d5d5c3a79e981af77b4
      
https://github.com/qemu/qemu/commit/aaf03a399af539e40c7f9d5d5c3a79e981af77b4
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert SQADD, SQSUB, UQADD, UQSUB to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 1f4dd04c2312a6673895575535f872cdb6708817
      
https://github.com/qemu/qemu/commit/1f4dd04c2312a6673895575535f872cdb6708817
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert SUQADD, USQADD to decodetree

These are faux 2-operand instructions, reading from rd.
Sort them next to the other three-operand same insns for clarity.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: beaa7c41b082d2bd31f3f97d80a66b055c42440f
      
https://github.com/qemu/qemu/commit/beaa7c41b082d2bd31f3f97d80a66b055c42440f
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert SSHL, USHL to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 940392c834e9e1a707bae584ac28f63d832b033f
      
https://github.com/qemu/qemu/commit/940392c834e9e1a707bae584ac28f63d832b033f
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/gengvec.c
    M target/arm/tcg/neon-dp.decode
    M target/arm/tcg/neon_helper.c
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate-neon.c
    M target/arm/tcg/translate.h

  Log Message:
  -----------
  target/arm: Convert SRSHL and URSHL (register) to gvec

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240528203044.612851-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 2214c9d721b6020f63bbda06d497147fcb19ae93
      
https://github.com/qemu/qemu/commit/2214c9d721b6020f63bbda06d497147fcb19ae93
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert SRSHL, URSHL to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: e72a68781572f31cbd6824681720ff936fba4707
      
https://github.com/qemu/qemu/commit/e72a68781572f31cbd6824681720ff936fba4707
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/gengvec.c
    M target/arm/tcg/neon-dp.decode
    M target/arm/tcg/neon_helper.c
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate-neon.c
    M target/arm/tcg/translate.h

  Log Message:
  -----------
  target/arm: Convert SQSHL and UQSHL (register) to gvec

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240528203044.612851-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 19b58f3048bad5761d8620360f499daf2b86ee0f
      
https://github.com/qemu/qemu/commit/19b58f3048bad5761d8620360f499daf2b86ee0f
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert SQSHL, UQSHL to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: cef9d54f6b6f2a2ecbfd358b7124c921bae4fb32
      
https://github.com/qemu/qemu/commit/cef9d54f6b6f2a2ecbfd358b7124c921bae4fb32
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/gengvec.c
    M target/arm/tcg/neon-dp.decode
    M target/arm/tcg/neon_helper.c
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate-neon.c
    M target/arm/tcg/translate.h

  Log Message:
  -----------
  target/arm: Convert SQRSHL and UQRSHL (register) to gvec

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-15-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 4f92fd736d4c4899e7a27b983d54b62f894eca07
      
https://github.com/qemu/qemu/commit/4f92fd736d4c4899e7a27b983d54b62f894eca07
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert SQRSHL, UQRSHL to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 6c9bccf52fc55b7d47b4a0904ee804bc2a6994fd
      
https://github.com/qemu/qemu/commit/6c9bccf52fc55b7d47b4a0904ee804bc2a6994fd
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert ADD, SUB (vector) to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-17-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 649005fd3a1805035b1a2343bae9505720275a97
      
https://github.com/qemu/qemu/commit/649005fd3a1805035b1a2343bae9505720275a97
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert CMGT, CMHI, CMGE, CMHS, CMTST, CMEQ to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-18-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 013506e03f27ec00a967c593fc34eda0b42bc100
      
https://github.com/qemu/qemu/commit/013506e03f27ec00a967c593fc34eda0b42bc100
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/gengvec.c

  Log Message:
  -----------
  target/arm: Use TCG_COND_TSTNE in gen_cmtst_{i32, i64}

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-19-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 2310eb0acac213f878be28adfd1c30a51da111f3
      
https://github.com/qemu/qemu/commit/2310eb0acac213f878be28adfd1c30a51da111f3
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/gengvec.c

  Log Message:
  -----------
  target/arm: Use TCG_COND_TSTNE in gen_cmtst_vec

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-20-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 203aca91252c4d74742f89b761bea801b89ca803
      
https://github.com/qemu/qemu/commit/203aca91252c4d74742f89b761bea801b89ca803
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/gengvec.c
    M target/arm/tcg/neon_helper.c
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate-neon.c
    M target/arm/tcg/translate.h

  Log Message:
  -----------
  target/arm: Convert SHADD, UHADD to gvec

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-21-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 6ef548ed4b07b8f1e22d049ec3da50df7e6e1ccc
      
https://github.com/qemu/qemu/commit/6ef548ed4b07b8f1e22d049ec3da50df7e6e1ccc
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert SHADD, UHADD to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-22-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 34c0d865a3a29a160f3e572bd49f606cddc56c85
      
https://github.com/qemu/qemu/commit/34c0d865a3a29a160f3e572bd49f606cddc56c85
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/gengvec.c
    M target/arm/tcg/neon_helper.c
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate-neon.c
    M target/arm/tcg/translate.h

  Log Message:
  -----------
  target/arm: Convert SHSUB, UHSUB to gvec

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-23-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: fdaf45d852147f0e565c75b18e1dcedc8af6e767
      
https://github.com/qemu/qemu/commit/fdaf45d852147f0e565c75b18e1dcedc8af6e767
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert SHSUB, UHSUB to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-24-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 8989b95e71dea9292bab77477949cc1a385c9543
      
https://github.com/qemu/qemu/commit/8989b95e71dea9292bab77477949cc1a385c9543
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/gengvec.c
    M target/arm/tcg/neon_helper.c
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate-neon.c
    M target/arm/tcg/translate.h

  Log Message:
  -----------
  target/arm: Convert SRHADD, URHADD to gvec

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-25-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 93b7b9057d825e984463a6ecbce9e7bce12a9ffe
      
https://github.com/qemu/qemu/commit/93b7b9057d825e984463a6ecbce9e7bce12a9ffe
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert SRHADD, URHADD to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-26-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 41c34bccc2fa834f662f7ac503bfb327ce9ef1cf
      
https://github.com/qemu/qemu/commit/41c34bccc2fa834f662f7ac503bfb327ce9ef1cf
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert SMAX, SMIN, UMAX, UMIN to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-27-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 5ea1b93ef7476acf3781d717792aad02468d6d41
      
https://github.com/qemu/qemu/commit/5ea1b93ef7476acf3781d717792aad02468d6d41
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert SABA, SABD, UABA, UABD to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-28-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: b73c7b174028369ac8b226b55df0df19e414b67e
      
https://github.com/qemu/qemu/commit/b73c7b174028369ac8b226b55df0df19e414b67e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert MUL, PMUL to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-29-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 8db93dcd3def0ca3226c924f549988b33a19371a
      
https://github.com/qemu/qemu/commit/8db93dcd3def0ca3226c924f549988b33a19371a
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert MLA, MLS to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-30-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 8f81dced5d9ce4bb537be4cf17f615e6ddd6b625
      
https://github.com/qemu/qemu/commit/8f81dced5d9ce4bb537be4cf17f615e6ddd6b625
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/gengvec.c
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate-neon.c
    M target/arm/tcg/translate.h

  Log Message:
  -----------
  target/arm: Tidy SQDMULH, SQRDMULH (vector)

We already have a gvec helper for the operations, but we aren't
using it on the aa32 neon side.  Create a unified expander for
use by both aa32 and aa64 translators.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-31-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: f80701cb44d334766a7c0e3b560044c1e5c52cc7
      
https://github.com/qemu/qemu/commit/f80701cb44d334766a7c0e3b560044c1e5c52cc7
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/helper.h
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/vec_helper.c

  Log Message:
  -----------
  target/arm: Convert SQDMULH, SQRDMULH to decodetree

These are the last instructions within disas_simd_three_reg_same
and disas_simd_scalar_three_reg_same, so remove them.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240528203044.612851-32-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 44463b96d277e71ba85120f151e9d70886a9b458
      
https://github.com/qemu/qemu/commit/44463b96d277e71ba85120f151e9d70886a9b458
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert FMADD, FMSUB, FNMADD, FNMSUB to decodetree

These are the only instructions in the 3 source scalar class.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240528203044.612851-33-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: fa31b7e1681cfe20917f172b537a3a0988efc583
      
https://github.com/qemu/qemu/commit/fa31b7e1681cfe20917f172b537a3a0988efc583
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/tcg/a64.decode
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Convert FCSEL to decodetree

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240528203044.612851-34-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: daf9748ac002ec35258e5986b6257961fd04b565
      
https://github.com/qemu/qemu/commit/daf9748ac002ec35258e5986b6257961fd04b565
  Author: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M target/arm/cpu64.c

  Log Message:
  -----------
  target/arm: Disable SVE extensions when SVE is disabled

Cc: qemu-stable@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2304
Reported-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Message-id: 20240526204551.553282-1-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: af3f5c4f8728c6d2ae0081fc38d66e9484cc391e
      
https://github.com/qemu/qemu/commit/af3f5c4f8728c6d2ae0081fc38d66e9484cc391e
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M docs/system/target-arm.rst

  Log Message:
  -----------
  docs/system/target-arm: Re-alphabetize board list

The board list in target-arm.rst is supposed to be in alphabetical
order by the title text of each file (which is not the same as
alphabetical order by filename).  A few items had got out of order;
correct them.

The entry for
"Facebook Yosemite v3.5 Platform and CraterLake Server (fby35)"
remains out-of-order, because this is not its own file
but is currently part of the aspeed.rst file.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240520141421.1895138-1-peter.maydell@linaro.org


  Commit: 408b2b3d9df631102919ada62add6d785f737f74
      
https://github.com/qemu/qemu/commit/408b2b3d9df631102919ada62add6d785f737f74
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M accel/tcg/cpu-exec.c
    M include/hw/core/tcg-cpu-ops.h
    M target/i386/tcg/helper-tcg.h
    M target/i386/tcg/sysemu/seg_helper.c

  Log Message:
  -----------
  accel/tcg: Make TCGCPUOps::cpu_exec_halt return bool for whether to halt

The TCGCPUOps::cpu_exec_halt method is called from cpu_handle_halt()
when the CPU is halted, so that a target CPU emulation can do
anything target-specific it needs to do.  (At the moment we only use
this on i386.)

The current specification of the method doesn't allow the target
specific code to do something different if the CPU is about to come
out of the halt state, because cpu_handle_halt() only determines this
after the method has returned.  (If the method called cpu_has_work()
itself this would introduce a potential race if an interrupt arrived
between the target's method implementation checking and
cpu_handle_halt() repeating the check.)

Change the definition of the method so that it returns a bool to
tell cpu_handle_halt() whether to stay in halt or not.

We will want this for the Arm target, where FEAT_WFxT wants to do
some work only for the case where the CPU is in halt but about to
leave it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240430140035.3889879-2-peter.maydell@linaro.org


  Commit: a96edb687e76a44b554b7975d9deda522c2c4302
      
https://github.com/qemu/qemu/commit/a96edb687e76a44b554b7975d9deda522c2c4302
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2024-05-30 (Thu, 30 May 2024)

  Changed paths:
    M docs/system/arm/emulation.rst
    M target/arm/cpu-features.h
    M target/arm/cpu.c
    M target/arm/cpu.h
    M target/arm/helper.c
    M target/arm/helper.h
    M target/arm/internals.h
    M target/arm/machine.c
    M target/arm/tcg/a64.decode
    M target/arm/tcg/cpu64.c
    M target/arm/tcg/op_helper.c
    M target/arm/tcg/translate-a64.c

  Log Message:
  -----------
  target/arm: Implement FEAT WFxT and enable for '-cpu max'

FEAT_WFxT introduces new instructions WFIT and WFET, which are like
the existing WFI and WFE but allow the guest to pass a timeout value
in a register.  The instructions will wait for an interrupt/event as
usual, but will also stop waiting when the value of CNTVCT_EL0 is
greater than or equal to the specified timeout value.

We implement WFIT by setting up a timer to expire at the right
point; when the timer expires it sets the EXITTB interrupt, which
will cause the CPU to leave the halted state. If we come out of
halt for some other reason, we unset the pending timer.

We implement WFET as a nop, which is architecturally permitted and
matches the way we currently make WFE a nop.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240430140035.3889879-3-peter.maydell@linaro.org


  Commit: 3c3c233677d4f2fe5f35c5d6d6e9b53df48054f4
      
https://github.com/qemu/qemu/commit/3c3c233677d4f2fe5f35c5d6d6e9b53df48054f4
  Author: David Hubbard <dmamfmgm@gmail.com>
  Date:   2024-05-31 (Fri, 31 May 2024)

  Changed paths:
    M hw/usb/hcd-ohci.c
    M hw/usb/trace-events

  Log Message:
  -----------
  hw/usb/hcd-ohci: Fix #1510, #303: pid not IN or OUT

This changes the ohci validation to not assert if invalid data is fed to the
ohci controller. The poc in https://bugs.launchpad.net/qemu/+bug/1907042 and
migrated to bug #303 does the following to feed it a SETUP pid (valid)
at an EndPt of 1 (invalid - all SETUP pids must be addressed to EndPt 0):

        uint32_t MaxPacket = 64;
        uint32_t TDFormat = 0;
        uint32_t Skip = 0;
        uint32_t Speed = 0;
        uint32_t Direction = 0;  /* #define OHCI_TD_DIR_SETUP 0 */
        uint32_t EndPt = 1;
        uint32_t FuncAddress = 0;
        ed->attr = (MaxPacket << 16) | (TDFormat << 15) | (Skip << 14)
                   | (Speed << 13) | (Direction << 11) | (EndPt << 7)
                   | FuncAddress;
        ed->tailp = /*TDQTailPntr= */ 0;
        ed->headp = ((/*TDQHeadPntr= */ &td[0]) & 0xfffffff0)
                   | (/* ToggleCarry= */ 0 << 1);
        ed->next_ed = (/* NextED= */ 0 & 0xfffffff0)

qemu-fuzz also caught the same issue in #1510. They are both fixed by this
patch.

With a tiny OS[1] that boots and executes the poc the repro shows the issue:

* OS that sends USB requests to a USB mass storage device
  but sends a SETUP with EndPt = 1
* qemu 6.2.0 (Debian 1:6.2+dfsg-2ubuntu6.19)
* qemu HEAD (4e66a0854)
* Actual OHCI controller (hardware)

Command line:
qemu-system-x86_64 -m 20 \
 -device pci-ohci,id=ohci \
 -drive if=none,format=raw,id=d,file=testmbr.raw \
 -device usb-storage,bus=ohci.0,drive=d \
 --trace "usb_*" --trace "ohci_*" -D qemu.log

Results are:

 qemu 6.2.0 | qemu HEAD | actual HW
------------+-----------+----------------
 assertion  | assertion | sets stall bit

The assertion message is:

> qemu-system-x86_64: ../../hw/usb/core.c:744: usb_ep_get: Assertion `pid == 
> USB_TOKEN_IN || pid == USB_TOKEN_OUT' failed.
> Aborted (core dumped)

Tip: if the flags "-serial pty -serial stdio" are added to the command line
the poc outputs its USB requests like this:

> Free mem 2M ohci port0 conn FS
> setup { 80 6 0 1 0 0 8 0 }
> ED info=80000 { mps=8 en=0 d=0 } tail=c20920
>   td0 c20880 nxt=c20960 f2000000 setup cbp=c20900 be=c20907       cbp=0 
> be=c20907
>   td1 c20960 nxt=c20980 f3140000    in cbp=c20908 be=c2090f       cbp=0 
> be=c2090f
>   td2 c20980 nxt=c20920 f3080000   out cbp=0 be=0                 cbp=0 be=0
>    rx { 12 1 0 2 0 0 0 8 }
> setup { 0 5 1 0 0 0 0 0 } tx {}
> ED info=80000 { mps=8 en=0 d=0 } tail=c20880
>   td0 c20920 nxt=c20960 f2000000 setup cbp=c20900 be=c20907       cbp=0 
> be=c20907
>   td1 c20960 nxt=c20880 f3100000    in cbp=0 be=0                 cbp=0 be=0
> setup { 80 6 0 1 0 0 12 0 }
> ED info=80081 { mps=8 en=0 d=1 } tail=c20960
>   td0 c20880 nxt=c209c0 f2000000 setup cbp=c20920 be=c20927
>   td1 c209c0 nxt=c209e0 f3140000    in cbp=c20928 be=c20939
>   td2 c209e0 nxt=c20960 f3080000   out cbp=0 be=0qemu-system-x86_64: 
> ../../hw/usb/core.c:744: usb_ep_get: Assertion `pid == USB_TOKEN_IN || pid == 
> USB_TOKEN_OUT' failed.
> Aborted (core dumped)

[1] The OS disk image has been emailed to philmd@linaro.org, mjt@tls.msk.ru,
and kraxel@redhat.com:

* testBadSetup.img.xz
* sha256: 045b43f4396de02b149518358bf8025d5ba11091e86458875339fc649e6e5ac6

Signed-off-by: David Hubbard <dmamfmgm@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: authorship and signed-off-by tag names fixed up as
 per on-list agreement]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 74abb45dac6979e7ff76172b7f0a24e869405184
      
https://github.com/qemu/qemu/commit/74abb45dac6979e7ff76172b7f0a24e869405184
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-05-31 (Fri, 31 May 2024)

  Changed paths:
    M accel/tcg/cpu-exec.c
    M docs/system/arm/emulation.rst
    M docs/system/target-arm.rst
    M hw/arm/Kconfig
    M hw/arm/sbsa-ref.c
    M hw/arm/xilinx_zynq.c
    M hw/intc/arm_gic.c
    M hw/usb/hcd-ohci.c
    M hw/usb/trace-events
    M include/hw/core/tcg-cpu-ops.h
    M target/arm/cpu-features.h
    M target/arm/cpu.c
    M target/arm/cpu.h
    M target/arm/cpu64.c
    M target/arm/helper.c
    M target/arm/helper.h
    M target/arm/internals.h
    M target/arm/machine.c
    M target/arm/tcg/a64.decode
    M target/arm/tcg/cpu64.c
    M target/arm/tcg/gengvec.c
    M target/arm/tcg/gengvec64.c
    M target/arm/tcg/neon-dp.decode
    M target/arm/tcg/neon_helper.c
    M target/arm/tcg/op_helper.c
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate-a64.h
    M target/arm/tcg/translate-neon.c
    M target/arm/tcg/translate.h
    M target/arm/tcg/vec_helper.c
    M target/i386/tcg/helper-tcg.h
    M target/i386/tcg/sysemu/seg_helper.c
    M tests/avocado/machine_aarch64_sbsaref.py

  Log Message:
  -----------
  Merge tag 'pull-target-arm-20240531' of 
https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm:
 * hw/intc/arm_gic: Fix set pending of PPIs
 * hw/intc/arm_gic: Fix writes to GICD_ITARGETSRn
 * xilinx_zynq: Add cache controller
 * xilinx_zynq: Support up to two CPU cores
 * tests/avocado: update sbsa-ref firmware
 * sbsa-ref: move to Neoverse-N2 as default
 * More decodetree conversion of A64 ASIMD insns
 * docs/system/target-arm: Re-alphabetize board list
 * Implement FEAT WFxT and enable for '-cpu max'
 * hw/usb/hcd-ohci: Fix #1510, #303: pid not IN or OUT

# -----BEGIN PGP SIGNATURE-----
#
# iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmZZvHgZHHBldGVyLm1h
# eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3uArEACZgk0hqKtRcEzwdJi7w7ax
# ta/Iyl7AA+ngmh0qcE8QX8rzZhcGcKhsaQ8dNESMIBqVi1fS0hmNrIUWhXqmvNmZ
# 07WJvQx7Ki9YNX02frjkRZTwWozsbW8uoaXgnngFK93PNh/IoQBRP5T/LIZ5t3d7
# 7I/O/tnS/LZrL6wtP4EbRIEvZ4dfJe3X+uSCHSF8iOYrJLrZCsy/ItJqzY6Y0f96
# iUoOfXjrYH2hM9VkJGHIGy1r9nYRkCxXREQh7ahw/z6mv0nIB1YTS1eR0dH9D1yM
# afdby8iPN7k+f3en+2dHfyPjani4vPd1/k9mgLnQtVLOHrdw2APs1Q59YwYhunhe
# ZC0Fcp6jBSkcI6LHRY0bRtY0U3SBPrfkSD5sJrNH1obnsSvizeSU3uCq1QmKRCRY
# FuARmE77ywY8CURiqfwPSrC/ecSnamueIQNKNPZVQ5ve3dbokp/Gr1eJgcq80ovK
# wIKmNhJq60qBcj2zQ1aw1PP3+zvbZ/rl2j0abGbxBH3Kkp9AvALDiLRMciazVWph
# vbx7e1Y90Zrs3ap1AAUFUyWexYPNvZWmSGOaWv6Wdt+1Yf/YDW9wrwjVd3eRG9rM
# vgNMrccysBUNDpS4s0KSbqLy9AsjqAa41SiKipWFBekUyQFboNpTNfDNCspIPj9m
# dnI4fyXkVmSCYFiW2akmjg==
# =Jy5P
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 31 May 2024 05:03:04 AM PDT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" 
[full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]

* tag 'pull-target-arm-20240531' of 
https://git.linaro.org/people/pmaydell/qemu-arm: (43 commits)
  hw/usb/hcd-ohci: Fix #1510, #303: pid not IN or OUT
  target/arm: Implement FEAT WFxT and enable for '-cpu max'
  accel/tcg: Make TCGCPUOps::cpu_exec_halt return bool for whether to halt
  docs/system/target-arm: Re-alphabetize board list
  target/arm: Disable SVE extensions when SVE is disabled
  target/arm: Convert FCSEL to decodetree
  target/arm: Convert FMADD, FMSUB, FNMADD, FNMSUB to decodetree
  target/arm: Convert SQDMULH, SQRDMULH to decodetree
  target/arm: Tidy SQDMULH, SQRDMULH (vector)
  target/arm: Convert MLA, MLS to decodetree
  target/arm: Convert MUL, PMUL to decodetree
  target/arm: Convert SABA, SABD, UABA, UABD to decodetree
  target/arm: Convert SMAX, SMIN, UMAX, UMIN to decodetree
  target/arm: Convert SRHADD, URHADD to decodetree
  target/arm: Convert SRHADD, URHADD to gvec
  target/arm: Convert SHSUB, UHSUB to decodetree
  target/arm: Convert SHSUB, UHSUB to gvec
  target/arm: Convert SHADD, UHADD to decodetree
  target/arm: Convert SHADD, UHADD to gvec
  target/arm: Use TCG_COND_TSTNE in gen_cmtst_vec
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/3b2fe44bb7f6...74abb45dac69

To unsubscribe from these emails, change your notification settings at 
https://github.com/qemu/qemu/settings/notifications



reply via email to

[Prev in Thread] Current Thread [Next in Thread]