Re: [Qemu-devel] [PATCH 02/21] target-mips: signal RI Exception on instructions removed in R6

[Maciej W. Rozycki]

On Fri, 30 May 2014, Aurelien Jarno wrote:

> Just a comment, not related to QEMU: while it looks at a first glance to
> build a binary that runs on both pre-R6 and R6 by not using the removed
> instructions, I do wonder how the transition would be done for unaligned
> load/stores. On pre-R6, unaligned load/stores are not supported so 
> LDR/LDL must be used, while on R6 LDR/LDL are not supported, so
> unaligned load/stores should be used instead...

 IIUC you just don't.  R6 is an incompatible ISA change (one could say 
just a new ISA that happens to resemble existing ones a bit), so you just 
have to recompile high-level sources from scratch and rewrite assembly 
code (here the resemblance helps, you might be able to use the C 
preprocessor or similar tools to switch between fragments meant for the 
specific ISAs).

  Maciej