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Re: [Qemu-devel] [v5][PATCH 0/5] xen: add Intel IGD passthrough support


From: Michael S. Tsirkin
Subject: Re: [Qemu-devel] [v5][PATCH 0/5] xen: add Intel IGD passthrough support
Date: Wed, 25 Jun 2014 13:32:11 +0300

On Wed, Jun 25, 2014 at 06:28:34PM +0800, Chen, Tiejun wrote:
> On 2014/6/25 18:21, Michael S. Tsirkin wrote:
> >On Wed, Jun 25, 2014 at 06:06:50PM +0800, Chen, Tiejun wrote:
> >>On 2014/6/25 17:59, Paolo Bonzini wrote:
> >>>Il 25/06/2014 11:55, Michael S. Tsirkin ha scritto:
> >>>>>You're saying we will reserve a free BAR to address those
> >>>>information to
> >>>>>expose to guest, but which device does this free BAR belong to? The
> >>>>video
> >>>>>device? Or PCH/MCH?
> >>>>
> >>>>If you just want to pass a couple of IDs, then don't, it's a waste.
> >>>>But I still don't know what problem you are trying to solve,
> >>>>looking at guest driver did not help.
> >>>
> >>>It's not just a couple of IDs, it's also random fields of the MCH
> >>>configuration space.  Grep drivers/gpu/drm/i915 for bridge_dev.
> >>>
> >>
> >>Paolo,
> >>
> >>No, we're not pointing the bridge_dev here, which is a host bridge at
> >>00:00.0.
> >>
> >>Here it should be a ISA bridge at 00:1f.0. Please see intel_detect_pch() to
> >>know why we need this.
> >>
> >>Thanks
> >>Tiejun
> >>
> >
> >So what if you dont?
> >
> >         if (!pch)
> >                 DRM_DEBUG_KMS("No PCH found.\n");
> >
> >Is that all? Seems harmless enough.
> >
> 
> I don't read the whole driver completely so I don't know now. I guess the
> driver may go other live path even without this setting in a live, or this
> is a real bug to this driver on Intel platform.
> 
> But anyway, I think we should guarantee the driver work under the same
> configuration as the native in the passthrough case.
> 
> Thanks
> Tiejun

Just get it working as a first step. Then address theoretical
issues in follow-up patches.

-- 
MST



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