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[PULL 21/27] target/arm: Delete unused VFP_DREG macros
From: |
Peter Maydell |
Subject: |
[PULL 21/27] target/arm: Delete unused VFP_DREG macros |
Date: |
Mon, 24 Aug 2020 10:48:05 +0100 |
As part of the Neon decodetree conversion we removed all
the uses of the VFP_DREG macros, but forgot to remove the
macro definitions. Do so now.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20200803124848.18295-1-peter.maydell@linaro.org
---
target/arm/translate.c | 15 ---------------
1 file changed, 15 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index b74a4350e39..4ffd8b1fbe5 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -2470,21 +2470,6 @@ static int disas_dsp_insn(DisasContext *s, uint32_t insn)
return 1;
}
-#define VFP_REG_SHR(x, n) (((n) > 0) ? (x) >> (n) : (x) << -(n))
-#define VFP_DREG(reg, insn, bigbit, smallbit) do { \
- if (dc_isar_feature(aa32_simd_r32, s)) { \
- reg = (((insn) >> (bigbit)) & 0x0f) \
- | (((insn) >> ((smallbit) - 4)) & 0x10); \
- } else { \
- if (insn & (1 << (smallbit))) \
- return 1; \
- reg = ((insn) >> (bigbit)) & 0x0f; \
- }} while (0)
-
-#define VFP_DREG_D(reg, insn) VFP_DREG(reg, insn, 12, 22)
-#define VFP_DREG_N(reg, insn) VFP_DREG(reg, insn, 16, 7)
-#define VFP_DREG_M(reg, insn) VFP_DREG(reg, insn, 0, 5)
-
static inline bool use_goto_tb(DisasContext *s, target_ulong dest)
{
#ifndef CONFIG_USER_ONLY
--
2.20.1
- [PULL 11/27] hw/arm/smmuv3: Support HAD and advertise SMMUv3.1 support, (continued)
- [PULL 11/27] hw/arm/smmuv3: Support HAD and advertise SMMUv3.1 support, Peter Maydell, 2020/08/24
- [PULL 12/27] hw/arm/smmuv3: Advertise SMMUv3.2 range invalidation, Peter Maydell, 2020/08/24
- [PULL 13/27] docs/system/arm: Document the Xilinx Versal Virt board, Peter Maydell, 2020/08/24
- [PULL 14/27] target/arm: Pull handling of XScale insns out of disas_coproc_insn(), Peter Maydell, 2020/08/24
- [PULL 15/27] target/arm: Separate decode from handling of coproc insns, Peter Maydell, 2020/08/24
- [PULL 16/27] target/arm: Convert A32 coprocessor insns to decodetree, Peter Maydell, 2020/08/24
- [PULL 17/27] target/arm: Tidy up disas_arm_insn(), Peter Maydell, 2020/08/24
- [PULL 18/27] target/arm: Do M-profile NOCP checks early and via decodetree, Peter Maydell, 2020/08/24
- [PULL 20/27] target/arm: Remove ARCH macro, Peter Maydell, 2020/08/24
- [PULL 19/27] target/arm: Convert T32 coprocessor insns to decodetree, Peter Maydell, 2020/08/24
- [PULL 21/27] target/arm: Delete unused VFP_DREG macros,
Peter Maydell <=
- [PULL 22/27] target/arm/translate.c: Delete/amend incorrect comments, Peter Maydell, 2020/08/24
- [PULL 23/27] target/arm: Delete unused ARM_FEATURE_CRC, Peter Maydell, 2020/08/24
- [PULL 25/27] target/arm: Make A32/T32 use new fpstatus_ptr() API, Peter Maydell, 2020/08/24
- [PULL 24/27] target/arm: Replace A64 get_fpstatus_ptr() with generic fpstatus_ptr(), Peter Maydell, 2020/08/24
- [PULL 27/27] target/arm: Use correct FPST for VCMLA, VCADD on fp16, Peter Maydell, 2020/08/24
- [PULL 26/27] target/arm: Implement FPST_STD_F16 fpstatus, Peter Maydell, 2020/08/24
- Re: [PULL 00/27] target-arm queue, Peter Maydell, 2020/08/24