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[PULL 58/76] tcg: Add tcg_get_insn_start_param
From: |
Richard Henderson |
Subject: |
[PULL 58/76] tcg: Add tcg_get_insn_start_param |
Date: |
Mon, 31 Aug 2020 09:05:43 -0700 |
MicroBlaze will shortly need to update a parameter in place.
Add an interface to read to match that for write.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/tcg/tcg.h | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index d40c925d04..15da46131b 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -777,11 +777,26 @@ static inline TCGv_i32 TCGV_HIGH(TCGv_i64 t)
}
#endif
+static inline TCGArg tcg_get_insn_param(TCGOp *op, int arg)
+{
+ return op->args[arg];
+}
+
static inline void tcg_set_insn_param(TCGOp *op, int arg, TCGArg v)
{
op->args[arg] = v;
}
+static inline target_ulong tcg_get_insn_start_param(TCGOp *op, int arg)
+{
+#if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
+ return tcg_get_insn_param(op, arg);
+#else
+ return tcg_get_insn_param(op, arg * 2) |
+ (tcg_get_insn_param(op, arg * 2 + 1) << 32);
+#endif
+}
+
static inline void tcg_set_insn_start_param(TCGOp *op, int arg, target_ulong v)
{
#if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
--
2.25.1
- [PULL 48/76] target/microblaze: Fix cpu unwind for fpu exceptions, (continued)
- [PULL 48/76] target/microblaze: Fix cpu unwind for fpu exceptions, Richard Henderson, 2020/08/31
- [PULL 49/76] target/microblaze: Mark fpu helpers TCG_CALL_NO_WG, Richard Henderson, 2020/08/31
- [PULL 51/76] target/microblaze: Cache mem_index in DisasContext, Richard Henderson, 2020/08/31
- [PULL 50/76] target/microblaze: Replace MSR_EE_FLAG with MSR_EE, Richard Henderson, 2020/08/31
- [PULL 52/76] target/microblaze: Fix cpu unwind for stackprot, Richard Henderson, 2020/08/31
- [PULL 54/76] target/microblaze: Assert no overlap in flags making up tb_flags, Richard Henderson, 2020/08/31
- [PULL 53/76] target/microblaze: Convert dec_load and dec_store to decodetree, Richard Henderson, 2020/08/31
- [PULL 55/76] target/microblaze: Move bimm to BIMM_FLAG, Richard Henderson, 2020/08/31
- [PULL 56/76] target/microblaze: Fix no-op mb_cpu_transaction_failed, Richard Henderson, 2020/08/31
- [PULL 57/76] target/microblaze: Store "current" iflags in insn_start, Richard Henderson, 2020/08/31
- [PULL 58/76] tcg: Add tcg_get_insn_start_param,
Richard Henderson <=
- [PULL 59/76] target/microblaze: Use cc->do_unaligned_access, Richard Henderson, 2020/08/31
- [PULL 60/76] target/microblaze: Replace clear_imm with tb_flags_to_set, Richard Henderson, 2020/08/31
- [PULL 62/76] target/microblaze: Tidy mb_cpu_dump_state, Richard Henderson, 2020/08/31
- [PULL 61/76] target/microblaze: Replace delayed_branch with tb_flags_to_set, Richard Henderson, 2020/08/31
- [PULL 63/76] target/microblaze: Convert brk and brki to decodetree, Richard Henderson, 2020/08/31
- [PULL 64/76] target/microblaze: Convert mbar to decodetree, Richard Henderson, 2020/08/31
- [PULL 65/76] target/microblaze: Reorganize branching, Richard Henderson, 2020/08/31
- [PULL 66/76] target/microblaze: Convert dec_br to decodetree, Richard Henderson, 2020/08/31
- [PULL 67/76] target/microblaze: Convert dec_bcc to decodetree, Richard Henderson, 2020/08/31
- [PULL 68/76] target/microblaze: Convert dec_rts to decodetree, Richard Henderson, 2020/08/31