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Re: [PULL 00/76] target/microblaze improvements


From: no-reply
Subject: Re: [PULL 00/76] target/microblaze improvements
Date: Mon, 31 Aug 2020 17:21:43 -0700 (PDT)

Patchew URL: 
20200831160601.833692-1-richard.henderson@linaro.org/">https://patchew.org/QEMU/20200831160601.833692-1-richard.henderson@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20200831160601.833692-1-richard.henderson@linaro.org
Subject: [PULL 00/76] target/microblaze improvements

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
   4bc08c6..2f4c51c  master     -> master
 - [tag update]      patchew/20200826171005.4055015-1-ehabkost@redhat.com -> 
patchew/20200826171005.4055015-1-ehabkost@redhat.com
 - [tag update]      patchew/20200827113259.25064-1-peter.maydell@linaro.org -> 
patchew/20200827113259.25064-1-peter.maydell@linaro.org
 - [tag update]      patchew/20200827124335.30586-1-leif@nuviainc.com -> 
patchew/20200827124335.30586-1-leif@nuviainc.com
 - [tag update]      patchew/20200827173051.31050-1-sw@weilnetz.de -> 
patchew/20200827173051.31050-1-sw@weilnetz.de
 - [tag update]      patchew/20200827175520.32355-1-sw@weilnetz.de -> 
patchew/20200827175520.32355-1-sw@weilnetz.de
 - [tag update]      patchew/20200827210920.111611-1-sw@weilnetz.de -> 
patchew/20200827210920.111611-1-sw@weilnetz.de
 - [tag update]      
patchew/20200828141929.77854-1-richard.henderson@linaro.org -> 
patchew/20200828141929.77854-1-richard.henderson@linaro.org
 - [tag update]      
patchew/20200828180243.443016-1-richard.henderson@linaro.org -> 
patchew/20200828180243.443016-1-richard.henderson@linaro.org
 * [new tag]         patchew/20200831235146.36045-1-david@gibson.dropbear.id.au 
-> patchew/20200831235146.36045-1-david@gibson.dropbear.id.au
Switched to a new branch 'test'
0d7dedb target/microblaze: Reduce linux-user address space to 32-bit
5f8c3e2 target/microblaze: Add flags markup to some helpers
466a318 target/microblaze: Remove cpu_R[0]
b1fb8b5 target/microblaze: Remove last of old decoder
0dfefb5 target/microblaze: Convert dec_stream to decodetree
c8b363c target/microblaze: Convert dec_msr to decodetree
7694f94 target/microblaze: Convert msrclr, msrset to decodetree
7dd5ab7 target/microblaze: Tidy do_rti, do_rtb, do_rte
539026b target/microblaze: Convert dec_rts to decodetree
4a40a45 target/microblaze: Convert dec_bcc to decodetree
eac8dd6 target/microblaze: Convert dec_br to decodetree
224c085 target/microblaze: Reorganize branching
f419c16 target/microblaze: Convert mbar to decodetree
c8837be target/microblaze: Convert brk and brki to decodetree
3a87b51 target/microblaze: Tidy mb_cpu_dump_state
1424196 target/microblaze: Replace delayed_branch with tb_flags_to_set
0ae7328 target/microblaze: Replace clear_imm with tb_flags_to_set
0954fbf target/microblaze: Use cc->do_unaligned_access
3c786be tcg: Add tcg_get_insn_start_param
15f0392 target/microblaze: Store "current" iflags in insn_start
dd4c8f4 target/microblaze: Fix no-op mb_cpu_transaction_failed
dd0128a target/microblaze: Move bimm to BIMM_FLAG
640419e target/microblaze: Assert no overlap in flags making up tb_flags
c53dbea target/microblaze: Convert dec_load and dec_store to decodetree
c725fe0 target/microblaze: Fix cpu unwind for stackprot
dbd989d target/microblaze: Cache mem_index in DisasContext
d927735 target/microblaze: Replace MSR_EE_FLAG with MSR_EE
d284d29 target/microblaze: Mark fpu helpers TCG_CALL_NO_WG
7e91cb3 target/microblaze: Fix cpu unwind for fpu exceptions
0a82365 target/microblaze: Convert dec_fpu to decodetree
fdc326c target/microblaze: Convert dec_imm to decodetree
46ffb06 target/microblaze: Convert dec_barrel to decodetree
fc30359 target/microblaze: Convert dec_bit to decodetree
9e7444e target/microblaze: Unwind properly when raising divide-by-zero
38ac916 target/microblaze: Convert dec_div to decodetree
a05d432 target/microblaze: Convert dec_mul to decodetree
15fe607 target/microblaze: Convert dec_and, dec_or, dec_xor to decodetree
6320c68 target/microblaze: Convert dec_pattern to decodetree
9551f17 target/microblaze: Implement cmp and cmpu inline
873ee28 target/microblaze: Convert dec_sub to decodetree
165699d target/microblaze: Convert dec_add to decodetree
ff24f67 target/microblaze: Add decodetree infrastructure
212839a target/microblaze: Ensure imm constant is always available
c6fc5d4 target/microblaze: Remove LOG_DIS
6b9d549 target/microblaze: Remove empty D macros
634c628 target/microblaze: Remove DISAS_GNU
f6e12e6 target/microblaze: Remove SIM_COMPAT
fd60a2a target/microblaze: Convert to translator_loop
137c956 target/microblaze: Convert to DisasContextBase
e9d715a target/microblaze: Check singlestep_enabled in gen_goto_tb
c2aa981 target/microblaze: Use DISAS_NORETURN
24e5371 target/microblaze: Split out MSR[C] to its own variable
089d389 target/microblaze: Tidy mb_tcg_init
35e3d1a target/microblaze: Rename env_* tcg variables to cpu_*
504bece target/microblaze: Remove helper_debug and env->debug
d8b5940 target/microblaze: Mark raise_exception as noreturn
7608d65 target/microblaze: Tidy raising of exceptions
8945896 target/microblaze: Remove cpu_ear
b74816d target/microblaze: Fix width of EDR
9be24ee target/microblaze: Fix width of BTR
3f9dfbc target/microblaze: Fix width of FSR
cb55e5f target/microblaze: Fix width of ESR
8859a93 target/microblaze: Fix width of MSR
e7de39d target/microblaze: Fix width of PC and BTARGET
4b26167 target/microblaze: Split the cpu_SR array
1455001 target/microblaze: Split out EDR from env->sregs
67e6dce target/microblaze: Split out BTR from env->sregs
256029a target/microblaze: Split out FSR from env->sregs
7989da1 target/microblaze: Split out ESR from env->sregs
bb70861 target/microblaze: Split out EAR from env->sregs
dd5b138 target/microblaze: Split out MSR from env->sregs
97999ea target/microblaze: Split out PC from env->sregs
7de26dc target/microblaze: Tidy gdbstub
32104b84 tests/tcg: Do not require FE_* exception bits
2381e76 tests/tcg: Do not require FE_TOWARDZERO
32ade00 tests/tcg: Add microblaze to arches filter

=== OUTPUT BEGIN ===
1/76 Checking commit 32ade0099e18 (tests/tcg: Add microblaze to arches filter)
ERROR: line over 90 characters
#24: FILE: tests/tcg/configure.sh:97:
+    
alpha|cris|hppa|i386|lm32|microblaze|microblazeel|m68k|openrisc|riscv64|s390x|sh4|sparc64)

total: 1 errors, 0 warnings, 8 lines checked

Patch 1/76 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

2/76 Checking commit 2381e76ba247 (tests/tcg: Do not require FE_TOWARDZERO)
3/76 Checking commit 32104b84fc2f (tests/tcg: Do not require FE_* exception 
bits)
4/76 Checking commit 7de26dc06890 (target/microblaze: Tidy gdbstub)
5/76 Checking commit 97999eaea67f (target/microblaze: Split out PC from 
env->sregs)
6/76 Checking commit dd5b138c2b12 (target/microblaze: Split out MSR from 
env->sregs)
7/76 Checking commit bb70861493b2 (target/microblaze: Split out EAR from 
env->sregs)
8/76 Checking commit 7989da1fafe5 (target/microblaze: Split out ESR from 
env->sregs)
9/76 Checking commit 256029a96446 (target/microblaze: Split out FSR from 
env->sregs)
10/76 Checking commit 67e6dce9f408 (target/microblaze: Split out BTR from 
env->sregs)
11/76 Checking commit 14550010ea94 (target/microblaze: Split out EDR from 
env->sregs)
12/76 Checking commit 4b26167a7837 (target/microblaze: Split the cpu_SR array)
ERROR: switch and case should be at the same indent
#125: FILE: target/microblaze/translate.c:543:
         switch (sr) {
+            case SR_PC:
[...]
+            case SR_MSR:
[...]
+            case SR_BTR:
[...]
+            case SR_EDR:

ERROR: switch and case should be at the same indent
#154: FILE: target/microblaze/translate.c:579:
         switch (sr) {
+            case SR_PC:
[...]
+            case SR_MSR:

total: 2 errors, 0 warnings, 287 lines checked

Patch 12/76 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

13/76 Checking commit e7de39d8569d (target/microblaze: Fix width of PC and 
BTARGET)
14/76 Checking commit 8859a934c315 (target/microblaze: Fix width of MSR)
15/76 Checking commit cb55e5fd1522 (target/microblaze: Fix width of ESR)
16/76 Checking commit 3f9dfbc2d82b (target/microblaze: Fix width of FSR)
17/76 Checking commit 9be24eea7275 (target/microblaze: Fix width of BTR)
18/76 Checking commit b74816d8c2ba (target/microblaze: Fix width of EDR)
19/76 Checking commit 89458966a79e (target/microblaze: Remove cpu_ear)
20/76 Checking commit 7608d65e99e3 (target/microblaze: Tidy raising of 
exceptions)
21/76 Checking commit d8b5940670c2 (target/microblaze: Mark raise_exception as 
noreturn)
22/76 Checking commit 504becee93e2 (target/microblaze: Remove helper_debug and 
env->debug)
23/76 Checking commit 35e3d1abbe73 (target/microblaze: Rename env_* tcg 
variables to cpu_*)
24/76 Checking commit 089d389698fa (target/microblaze: Tidy mb_tcg_init)
25/76 Checking commit 24e537176135 (target/microblaze: Split out MSR[C] to its 
own variable)
26/76 Checking commit c2aa981dc20c (target/microblaze: Use DISAS_NORETURN)
27/76 Checking commit e9d715a25322 (target/microblaze: Check singlestep_enabled 
in gen_goto_tb)
28/76 Checking commit 137c956c34e4 (target/microblaze: Convert to 
DisasContextBase)
29/76 Checking commit fd60a2a6cfe5 (target/microblaze: Convert to 
translator_loop)
30/76 Checking commit f6e12e6a6cd8 (target/microblaze: Remove SIM_COMPAT)
31/76 Checking commit 634c6287cd12 (target/microblaze: Remove DISAS_GNU)
32/76 Checking commit 6b9d54925c00 (target/microblaze: Remove empty D macros)
33/76 Checking commit c6fc5d4224a0 (target/microblaze: Remove LOG_DIS)
34/76 Checking commit 212839a3cd07 (target/microblaze: Ensure imm constant is 
always available)
35/76 Checking commit ff24f676c604 (target/microblaze: Add decodetree 
infrastructure)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#16: 
new file mode 100644

total: 0 errors, 1 warnings, 60 lines checked

Patch 35/76 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
36/76 Checking commit 165699da76c5 (target/microblaze: Convert dec_add to 
decodetree)
ERROR: spaces required around that '*' (ctx:WxV)
#256: FILE: target/microblaze/translate.c:330:
+static bool trans_zero(DisasContext *dc, arg_zero *arg)
                                                   ^

total: 1 errors, 0 warnings, 279 lines checked

Patch 36/76 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

37/76 Checking commit 873ee2858743 (target/microblaze: Convert dec_sub to 
decodetree)
38/76 Checking commit 9551f1759c3a (target/microblaze: Implement cmp and cmpu 
inline)
39/76 Checking commit 6320c68f6ccb (target/microblaze: Convert dec_pattern to 
decodetree)
40/76 Checking commit 15fe607e07f7 (target/microblaze: Convert dec_and, dec_or, 
dec_xor to decodetree)
41/76 Checking commit a05d43282444 (target/microblaze: Convert dec_mul to 
decodetree)
42/76 Checking commit 38ac91626de4 (target/microblaze: Convert dec_div to 
decodetree)
43/76 Checking commit 9e7444e60cb7 (target/microblaze: Unwind properly when 
raising divide-by-zero)
44/76 Checking commit fc30359d501b (target/microblaze: Convert dec_bit to 
decodetree)
ERROR: spaces required around that '*' (ctx:WxV)
#160: FILE: target/microblaze/translate.c:545:
+static bool trans_wdic(DisasContext *dc, arg_wdic *a)
                                                   ^

total: 1 errors, 0 warnings, 227 lines checked

Patch 44/76 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

45/76 Checking commit 46ffb06bbf4c (target/microblaze: Convert dec_barrel to 
decodetree)
46/76 Checking commit fdc326c0c8ae (target/microblaze: Convert dec_imm to 
decodetree)
ERROR: spaces required around that '*' (ctx:WxV)
#33: FILE: target/microblaze/translate.c:480:
+static bool trans_imm(DisasContext *dc, arg_imm *arg)
                                                 ^

total: 1 errors, 0 warnings, 44 lines checked

Patch 46/76 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

47/76 Checking commit 0a823659b840 (target/microblaze: Convert dec_fpu to 
decodetree)
48/76 Checking commit 7e91cb362270 (target/microblaze: Fix cpu unwind for fpu 
exceptions)
49/76 Checking commit d284d293a1f6 (target/microblaze: Mark fpu helpers 
TCG_CALL_NO_WG)
50/76 Checking commit d9277357cbd6 (target/microblaze: Replace MSR_EE_FLAG with 
MSR_EE)
51/76 Checking commit dbd989dfe4e1 (target/microblaze: Cache mem_index in 
DisasContext)
52/76 Checking commit c725fe02b326 (target/microblaze: Fix cpu unwind for 
stackprot)
53/76 Checking commit c53dbeaa6e85 (target/microblaze: Convert dec_load and 
dec_store to decodetree)
WARNING: Block comments use a leading /* on a separate line
#350: FILE: target/microblaze/translate.c:944:
+        /* FIXME: if the alignment is wrong, we should restore the value

total: 0 errors, 1 warnings, 791 lines checked

Patch 53/76 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
54/76 Checking commit 640419e5c31b (target/microblaze: Assert no overlap in 
flags making up tb_flags)
55/76 Checking commit dd0128a2fa65 (target/microblaze: Move bimm to BIMM_FLAG)
56/76 Checking commit dd4c8f4b01f8 (target/microblaze: Fix no-op 
mb_cpu_transaction_failed)
57/76 Checking commit 15f0392b1027 (target/microblaze: Store "current" iflags 
in insn_start)
58/76 Checking commit 3c786be3d027 (tcg: Add tcg_get_insn_start_param)
59/76 Checking commit 0954fbfc7898 (target/microblaze: Use 
cc->do_unaligned_access)
ERROR: spaces required around that '<<' (ctx:VxV)
#37: FILE: target/microblaze/cpu.h:82:
+#define          ESR_W         (1<<11) /* Unaligned word access */
                                  ^

total: 1 errors, 0 warnings, 204 lines checked

Patch 59/76 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

60/76 Checking commit 0ae7328b9266 (target/microblaze: Replace clear_imm with 
tb_flags_to_set)
61/76 Checking commit 1424196cc193 (target/microblaze: Replace delayed_branch 
with tb_flags_to_set)
62/76 Checking commit 3a87b5189820 (target/microblaze: Tidy mb_cpu_dump_state)
63/76 Checking commit c8837be1e305 (target/microblaze: Convert brk and brki to 
decodetree)
64/76 Checking commit f419c16adfcc (target/microblaze: Convert mbar to 
decodetree)
ERROR: spaces required around that '+' (ctx:ExV)
#59: FILE: target/microblaze/translate.c:1153:
+                       +offsetof(CPUState, halted));
                        ^

total: 1 errors, 0 warnings, 111 lines checked

Patch 64/76 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

65/76 Checking commit 224c085312a4 (target/microblaze: Reorganize branching)
66/76 Checking commit eac8dd68662b (target/microblaze: Convert dec_br to 
decodetree)
67/76 Checking commit 4a40a45501d7 (target/microblaze: Convert dec_bcc to 
decodetree)
ERROR: spaces required around that '*' (ctx:WxV)
#125: FILE: target/microblaze/translate.c:1134:
+    static bool trans_##NAME(DisasContext *dc, arg_typea_bc *arg)       \
                                                             ^

ERROR: spaces required around that '*' (ctx:WxV)
#127: FILE: target/microblaze/translate.c:1136:
+    static bool trans_##NAME##d(DisasContext *dc, arg_typea_bc *arg)    \
                                                                ^

ERROR: spaces required around that '*' (ctx:WxV)
#129: FILE: target/microblaze/translate.c:1138:
+    static bool trans_##NAME##i(DisasContext *dc, arg_typeb_bc *arg)    \
                                                                ^

ERROR: spaces required around that '*' (ctx:WxV)
#131: FILE: target/microblaze/translate.c:1140:
+    static bool trans_##NAME##id(DisasContext *dc, arg_typeb_bc *arg)   \
                                                                 ^

total: 4 errors, 0 warnings, 179 lines checked

Patch 67/76 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

68/76 Checking commit 539026b12c05 (target/microblaze: Convert dec_rts to 
decodetree)
69/76 Checking commit 7dd5ab73d21a (target/microblaze: Tidy do_rti, do_rtb, 
do_rte)
70/76 Checking commit 7694f94e3e85 (target/microblaze: Convert msrclr, msrset 
to decodetree)
71/76 Checking commit c8b363c50946 (target/microblaze: Convert dec_msr to 
decodetree)
72/76 Checking commit 0dfefb59890f (target/microblaze: Convert dec_stream to 
decodetree)
73/76 Checking commit b1fb8b5e7ace (target/microblaze: Remove last of old 
decoder)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#17: 
deleted file mode 100644

total: 0 errors, 1 warnings, 128 lines checked

Patch 73/76 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
74/76 Checking commit 466a31810f81 (target/microblaze: Remove cpu_R[0])
75/76 Checking commit 5f8c3e2d6c17 (target/microblaze: Add flags markup to some 
helpers)
76/76 Checking commit 0d7dedb8e895 (target/microblaze: Reduce linux-user 
address space to 32-bit)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
20200831160601.833692-1-richard.henderson@linaro.org/testing.checkpatch/?type=message">http://patchew.org/logs/20200831160601.833692-1-richard.henderson@linaro.org/testing.checkpatch/?type=message.
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