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Re: [RFC PATCH 07/12] hw/acpi/aml-build: add processor hierarchy node st
From: |
Andrew Jones |
Subject: |
Re: [RFC PATCH 07/12] hw/acpi/aml-build: add processor hierarchy node structure |
Date: |
Thu, 17 Sep 2020 10:27:31 +0200 |
On Thu, Sep 17, 2020 at 11:20:28AM +0800, Ying Fang wrote:
> Add the processor hierarchy node structures to build ACPI information
> for CPU topology. Three helpers are introduced:
>
> (1) build_socket_hierarchy for socket description structure
> (2) build_processor_hierarchy for processor description structure
> (3) build_smt_hierarchy for thread (logic processor) description structure
>
> Signed-off-by: Ying Fang <fangying1@huawei.com>
> Signed-off-by: Henglong Fan <fanhenglong@huawei.com>
> ---
> hw/acpi/aml-build.c | 37 +++++++++++++++++++++++++++++++++++++
> include/hw/acpi/aml-build.h | 7 +++++++
> 2 files changed, 44 insertions(+)
>
> diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
> index f6fbc9b95d..13eb6e1345 100644
> --- a/hw/acpi/aml-build.c
> +++ b/hw/acpi/aml-build.c
> @@ -1754,6 +1754,43 @@ void build_slit(GArray *table_data, BIOSLinker
> *linker, MachineState *ms)
> table_data->len - slit_start, 1, NULL, NULL);
> }
>
> +/*
> + * ACPI 6.3: 5.2.29.1 Processor hierarchy node structure (Type 0)
> + */
> +void build_socket_hierarchy(GArray *tbl, uint32_t parent, uint32_t id)
> +{
> + build_append_byte(tbl, 0); /* Type 0 - processor */
> + build_append_byte(tbl, 20); /* Length, no private resources */
> + build_append_int_noprefix(tbl, 0, 2); /* Reserved */
> + build_append_int_noprefix(tbl, 1, 4); /* Flags: Physical package */
> + build_append_int_noprefix(tbl, parent, 4); /* Parent */
> + build_append_int_noprefix(tbl, id, 4); /* ACPI processor ID */
> + build_append_int_noprefix(tbl, 0, 4); /* Number of private resources */
> +}
> +
> +void build_processor_hierarchy(GArray *tbl, uint32_t flags,
> + uint32_t parent, uint32_t id)
> +{
> + build_append_byte(tbl, 0); /* Type 0 - processor */
> + build_append_byte(tbl, 20); /* Length, no private resources */
> + build_append_int_noprefix(tbl, 0, 2); /* Reserved */
> + build_append_int_noprefix(tbl, flags, 4); /* Flags */
> + build_append_int_noprefix(tbl, parent, 4); /* Parent */
> + build_append_int_noprefix(tbl, id, 4); /* ACPI processor ID */
> + build_append_int_noprefix(tbl, 0, 4); /* Number of private resources */
> +}
I see you took this from
https://patchwork.ozlabs.org/project/qemu-devel/patch/20180704124923.32483-6-drjones@redhat.com/
(even though you neglected to mention that)
I've tweaked my implementation of it slightly per Igor's comments for the
refresh. See build_processor_hierarchy_node() in
https://github.com/rhdrjones/qemu/commit/439b38d67ca1f2cbfa5b9892a822b651ebd05c11
> +
> +void build_smt_hierarchy(GArray *tbl, uint32_t parent, uint32_t id)
> +{
> + build_append_byte(tbl, 0); /* Type 0 - processor */
> + build_append_byte(tbl, 20); /* Length, add private resources */
> + build_append_int_noprefix(tbl, 0, 2); /* Reserved */
> + build_append_int_noprefix(tbl, 0x0e, 4); /* Processor is a thread */
> + build_append_int_noprefix(tbl, parent , 4); /* parent */
> + build_append_int_noprefix(tbl, id, 4); /* ACPI processor ID */
> + build_append_int_noprefix(tbl, 0, 4); /* Num of private resources
> */
> +}
> +
> /* build rev1/rev3/rev5.1 FADT */
> void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f,
> const char *oem_id, const char *oem_table_id)
> diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
> index d27da03d64..ff4c6a38f3 100644
> --- a/include/hw/acpi/aml-build.h
> +++ b/include/hw/acpi/aml-build.h
> @@ -435,6 +435,13 @@ void build_srat_memory(AcpiSratMemoryAffinity *numamem,
> uint64_t base,
>
> void build_slit(GArray *table_data, BIOSLinker *linker, MachineState *ms);
>
> +void build_socket_hierarchy(GArray *tbl, uint32_t parent, uint32_t id);
> +
> +void build_processor_hierarchy(GArray *tbl, uint32_t flags,
> + uint32_t parent, uint32_t id);
> +
> +void build_smt_hierarchy(GArray *tbl, uint32_t parent, uint32_t id);
Why add build_socket_hierarchy() and build_smt_hierarchy() ?
> +
> void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f,
> const char *oem_id, const char *oem_table_id);
>
> --
> 2.23.0
>
Thanks,
drew
- [RFC PATCH 09/12] target/arm/cpu: Add CPU cache description for arm, (continued)
- [RFC PATCH 09/12] target/arm/cpu: Add CPU cache description for arm, Ying Fang, 2020/09/16
- [RFC PATCH 04/12] device_tree: add qemu_fdt_add_path, Ying Fang, 2020/09/16
- [RFC PATCH 01/12] linux headers: Update linux header with KVM_ARM_SET_MP_AFFINITY, Ying Fang, 2020/09/16
- [RFC PATCH 03/12] target/arm/kvm32: make MPIDR consistent with CPU Topology, Ying Fang, 2020/09/16
- [RFC PATCH 07/12] hw/acpi/aml-build: add processor hierarchy node structure, Ying Fang, 2020/09/16
- Re: [RFC PATCH 07/12] hw/acpi/aml-build: add processor hierarchy node structure,
Andrew Jones <=
- [RFC PATCH 06/12] hw/arm/virt-acpi-build: distinguish possible and present cpus, Ying Fang, 2020/09/16
- [RFC PATCH 08/12] hw/arm/virt-acpi-build: add PPTT table, Ying Fang, 2020/09/16
- [RFC PATCH 12/12] hw/arm/virt-acpi-build: Enable CPU cache topology, Ying Fang, 2020/09/16
- [RFC PATCH 10/12] hw/arm/virt: add fdt cache information, Ying Fang, 2020/09/16
- [RFC PATCH 11/12] hw/acpi/aml-build: build ACPI CPU cache topology information, Ying Fang, 2020/09/16